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RTL8211E-VL-CG Datasheet(PDF) 26 Page - Realtek Semiconductor Corp.

Part No. RTL8211E-VL-CG
Description  INTEGRATED 10/100/1000M ETHERNET TRANSCEIVER
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Maker  REALTEK [Realtek Semiconductor Corp.]
Homepage  https://www.realtek.com/en/
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RTL8211E-VL-CG Datasheet(HTML) 26 Page - Realtek Semiconductor Corp.

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RTL8211E/RTL8211EG
Datasheet
Integrated 10/100/1000M Ethernet Transceiver
18
Track ID: JATR-2265-11 Rev. 1.4
Follow the register settings below to enable Green Ethernet (Default is ‘Enabled’)
Write Reg31, Data=0x0003 (page3)
Write Reg25, Data=0x3247
Write Reg31, Data=0x0005 (page5)
Write Reg1, Data=0x0680
Write Reg31, Data=0x0000 (page0)
7.10. MAC/PHY Interface
The RTL8211E supports industry standards and is suitable for most off-the-shelf MACs with an RGMII
interface.
The RTL8211EG supports industry standards and is suitable for most off-the-shelf MACs with GMII and
RGMII interfaces.
7.10.1. MII
In 100Base-TX and 10Base-T modes (MII mode is selected), TXC and RXC sources are 25MHz and
2.5MHz respectively. TXC and RXC will always be generated by the PHY. TXD[3:0] and RXD[3:0]
signals are used for date transitions.
7.10.2. GMII
In 1000Base-T mode (GMII interface is selected), a 125MHz transmit clock is expected on GTX_CLK.
TXCLK sources 25MHz or 2.5MHz clock depending on the link speed. RXCLK sources the 125MHz
receive clock.
7.10.3. RGMII
In 1000Base-T mode (RGMII interface is selected), TXC and RXC sources are 125MHz. TXC will always
be generated by the MAC and RXC will always be generated by the PHY. TXD[3:0] and RXD[3:0] signals
are used for date transitions on rising edge and on falling edge of clock.
7.10.4. Management Interface
The management interface provides access to the internal registers through the MDC and MDIO pins as
described in IEEE 802.3u section 22. The MDC signal, provided by the MAC, is the management data
clock reference to the MDIO signal. The MDIO is the management data input/output and is a bi-directional
signal that runs synchronously to MDC. The MDIO pin needs a 1.5k Ohm pull-up resistor to maintain the
MDIO high during idle and turnaround.


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