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FXMA2104 Datasheet(PDF) 4 Page - ON Semiconductor |
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FXMA2104 Datasheet(HTML) 4 Page - ON Semiconductor |
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© 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FXMA2104 • Rev. 1.0.1 3 Pin Configuration Figure 2. UMLP (Top-Through View) Pin Definitions Pin # Name Description 1 VCCB B-Side Power Supply 2 VCCA A-Side Power Supply 3, 4, 5, 6 A0, A1, A2, A3 A-Side Inputs or 3-State Outputs 7 GND Ground 8 OE Output Enable Input 9, 10, 11, 12 B3, B2, B1, B0, B-Side Inputs or 3-State Outputs Truth Table Control Outputs OE LOW Logic Level 3-State HIGH Logic Level Normal Operation Note: 1. If the OE pin is driven LOW, the FXMA2104 is disabled and the A0, A1, A2, A3, B0, B1, B2 and B3 pins (including dynamic drivers) are forced into 3-state. |
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