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TPS3514D Datasheet(PDF) 9 Page - Texas Instruments

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Part # TPS3514D
Description  PC POWER-SUPPLY SUPERVISORS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS3514D Datasheet(HTML) 9 Page - Texas Instruments

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TPS3514
SLVS422A – JULY 2003
www.ti.com
9
Furthermore, motherboards should be designed to
comply with the above recommended timing. If timings
other than these are implemented or required, this
information should be clearly specified.
The TPS3514 family of power-supply supervisors
provides a PGO for the 3.3V and 5V supply voltage rails
and a separate Power-Good Input (PGI). An internal
timer is used to generate a 300ms power-good delay.
If the voltage signals at PGI, VS33, and VS5 rise above
the under-voltage threshold, the open-drain PGO will go
HIGH after a delay of 300ms. When the PGI voltage or
any of the 3.3V/5V rail drops below the under-voltage
threshold, PGO will be disabled immediately.
POWER-SUPPLY REMOTE ON/OFF (PSON) AND
FAULT PROTECT OUTPUT (FPO)
Since the latest personal computer generation focuses
on easy turn-on and power–saving functions, the PC
power supply will require two characteristics. One is a
DC power-supply remote on/off function; the other is
standby voltage to achieve very low power consumption
of the PC system. Thus, requiring the main power
supply to be shut down.
The power-supply remote on/off (PSON) is an
active-LOW signal that turns on all of the main power
rails including the 3.3V, 5V, –5V, and –12V power rails.
When this signal is held HIGH by the PC motherboard
or left open-circuited, the signal of the Fault Protect
Output (FPO) also goes HIGH. In this condition, the
main power rails should not deliver current and should
be held at 0V.
When the FPO signal is held HIGH due to an occurring
fault condition, the fault status will be latched and the
outputs of the main power rails should not deliver
current and should be held at 0V. Toggling PSON from
LOW to HIGH will reset the fault protection latch. During
this fault condition, only the standby power is not
affected.
When PSON goes from HIGH to LOW or LOW to HIGH,
the 38ms debounce block will prevent a glitch on the
input from disabling/enabling the FPO output. During
the HIGH to LOW transition, the under-voltage function
is disabled to prevent turn-on failure.
Power should be delivered to the rails only if the PSON
signal is held at ground potential, thus, FPO is active
LOW. The FPO pin can be connected to 5VDC (or up to
15VDC) through a pull-up resistor.
UNDER-VOLTAGE PROTECTION (UVP)
The TPS3514 provides Under-Voltage Protection
(UVP) for the 12V rail and Under-Voltage Detect (UVD)
for the 3.3V and 5V rails. When an under-voltage
condition appears at the VS12 input pin for more than
150
µs, the FPO output goes HIGH and PGO goes LOW.
Also, this fault condition will be latched until PSON is
toggled from LOW to HIGH or VDD is removed.
OVER-CURRENT PROTECTION (OCP)
In bridge, or forward type, off-line switching power
supplies, usually designed for medium to large power,
the overload protection design needs to be very precise.
Most of these types of power supplies sense the output
current for an overload condition. The trigger-point
needs to be set higher than the maximum load in order
to prevent false turn-on.
The TPS3514 provides Over-Current Protection (OCP)
for the 3.3V, 5V, and 12V rails. When an over-current
condition appears at the OCP comparator input pins for
more than 73
µs, the FPO output goes HIGH and PGO
goes LOW. Also, this fault condition will be latched until
PSON is toggled from LOW to HIGH or VDD is removed.
The resistor connected between the RI pin and the GND
pin will create a precise I(REF) for the OCP function. The
formula for choosing the RI resistor is V(RI)/I(REF). The
I(REF) range is from 12.5µA to 62.5µA. Three OCP
comparators and the I(REF) section are supplied through
the V12 pin. Current drawn from the VS12 pin is less
than 1mA.


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