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IS61LV25616 Datasheet(PDF) 1 Page - Integrated Circuit Solution Inc

Part No. IS61LV25616
Description  256 X 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY
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Maker  ICSI [Integrated Circuit Solution Inc]
Homepage  http://www.icsi.com.tw
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IS61LV25616 Datasheet(HTML) 1 Page - Integrated Circuit Solution Inc

 
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Integrated Circuit Solution Inc.
1
SR040-0C
FEATURES
• High-speed access time: 8, 10, 12, and 15 ns
• CMOS low power operation
• TTL compatible interface levels
• Single 3.3V ± 10% power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
IS61LV25616
256K x 16 HIGH SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
DESCRIPTION
The
1+51 IS61LV25616 is a high-speed, 4,194,304-bit static
RAM organized as 262,144 words by 16 bits. It is fabricated
using
1+51's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power consump-
tion devices.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
The IS61LV25616 is packaged in the JEDEC standard
44-pin 400mil SOJ, 44 pin 400mil TSOP-2 and 48-pin 6*8 TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
A0-A17
CE
OE
WE
256K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
UB
LB


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