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DEM16216SYH-LY Datasheet(PDF) 12 Page - List of Unclassifed Manufacturers

Part No. DEM16216SYH-LY
Description  DEM16216SYH-LY
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DEM16216SYH-LY Datasheet(HTML) 12 Page - List of Unclassifed Manufacturers

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DEM 16216 SYH-LY
Product Specification
10
11) Read data to RAM
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read binary 8-bit data from DDRAM/CGRAM.
The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not
performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined.
If you read RAM data several times without RAM address set instruction before read operation, you can get correct
RAM data. In the case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address
set instruction; it also transfers RAM data to the output data register.
After read operation the address counter is automatically increased/decreased by 1 according to the entry mode. After
CGRAM read operation, display shift may not be executed correctly.
In the case of RAM write operation, after this AC is increased/decreased by 1 like read operation. At his time, AC
indicates the next address position, but your can read only the previous data by the read instruction.
Table 5.instruction table
Instruction Code
Instruction
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB
1
DB0
Description
Execution
time
(fosc=
270kHz)
Clear
Display
0
0
0
0
0
0
0
0
0
1
Write “20H” to DDRAM and set
DDRAM address to “00H” from
AC.
1.53 ms
Return
Home
0
0
0
0
0
0
0
0
1
x
Set DDRAM address to “00H”from
AC and return cursor to its original
position if shifted.
1.53ms
Entry Mode
set
0
0
0
0
0
0
0
1
I/D
SH
Assign cursor moving direction and
enable the shift of entire display.
39us
Display
ON/OFF
Control
0
0
0
0
0
0
1
D
C
B
Set display (D), cursor(C), and
blinking of cursor (B) on/off control
bit.
39us
Cursor or
Display shift
0
0
0
0
0
1
S/C
R/L
X
X
Set cursor moving and display shift
control bit, and the direction without
changing of DDRAM data.
39us
Function set
0
0
0
0
1
DL
N
F
X
X
Set interface data length (DL:4-
bit/8-bit), numbers of display line
(N:1-line/2-line, display font type
(F:0…)
39us
Set
CGRAM
address
0
0
0
1
AC5
AC4
AC3
AC2
AC
1
AC0
Set CGRAM address in address
counter.
39us
Set
CGRAM
address
0
0
1
AC6
AC5
AC4
AC3
AC2
AC
1
AC0
Set DDRAM address in address
counter.
39us
Read busy
flag and
address
0
1
BF
AC6
AC5
AC4
AC3
AC2
AC
1
AC0
Whether during internal operation or
not can be known by reading BF.
The contents of address counter can
also be read.
0us
Write data
to RAM
1
0
D7
D6
D5
D4
D3
D2
D1
D0
Write data into internal RAM
(DDRAM/CGRAM).
43us
Read data to
RAM
1
1
D7
D6
D5
D4
D3
D2
D1
D0
Read data into internal RAM
(DDRAM/CGRAM).
43us
NOTE: when you make an MPU program with checking the busy flag (DB7), it must be necessary 1/2 Fosc for
executing the next instruction by falling E signal after the busy flag (DB7) goes to “0”.


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