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AP2358 Datasheet(PDF) 9 Page - AIT Components Ltd.
AITCOMPONENTS [AIT Components Ltd.]
AP2358 Datasheet(HTML) 9 Page - AIT Components Ltd.
/ 12 page
AiT Semiconductor Inc.
AC-DC PWM CONTROLLER
CURRENT MODE PWM POWER SWITCH FREQ SHUFFLING
- JUN 2016 RELEASED -
- 9 -
The switch frequency reduces at light/no load condition to improve the conversion efficiency. At light load or
no load condition, the FB input drop below burst mode threshold level and device enters Burst Mode control.
The Gate drive output switches only when V
voltage drop below a preset level and FB input is active to
output an on state. Otherwise the gate drive remains at off state to minimize the switching loss and reduces
the standby power consumption to the greatest extend. The switching frequency control also eliminates the
audio noise at any loading conditions.
The switching frequency of AP2358 is internally fixed at 48kHz. No external frequency setting components
are required for PCB design simplification.
Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in AP2358 current mode PWM control. The switch current is
detected by a sense resistor into the sense pin. An internal leading edge blanking circuit chops off the sensed
voltage spike at initial internal power MOSFET on state due to snubber diode reverse recovery and surge
gate current of internal power MOSFET so that the external RC filtering on sense input is no longer needed.
The current limiting comparator is disabled and cannot turn off the internal power MOSFET during the
blanking period. The PWM duty cycle is determined by the current sense input voltage and the FB input
Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM
generation. This greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation
and thus reduces the output ripple voltage.
The internal power MOSFET in AP2358 is driven by a dedicated gate driver for power switch control. Too
weak the gate drives strength results in higher conduction and switch loss of MOSFET while too strong gate
drive results the compromise of EMI.
A good tradeoff is achieved through the built-in totem pole gate design with right output strength and dead
time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control
In addition to the gate drive control scheme mentioned, the gate drive strength can also be adjusted externally
by a resistor connected between V
, the falling edge of the Drain output can be well controlled. It
provides great flexibility for system EMI design.
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