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M48Z12-150PC1 Datasheet(PDF) 7 Page - STMicroelectronics

Part No. M48Z12-150PC1
Description  5V, 16 Kbit (2Kb x 8) ZEROPOWER SRAM
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M48Z02, M48Z12
READ Mode
The M48Z02/12 is in the READ Mode whenever W
(WRITE Enable) is high and E (Chip Enable) is
low. The device architecture allows ripple-through
access of data from eight of 16,384 locations in the
static storage array. Thus, the unique address
specified by the 11 Address Inputs defines which
one of the 2,048 bytes of data is to be accessed.
Valid data will be available at the Data I/O pins
within Address Access time (tAVQV) after the last
address input signal is stable, providing that the E
and G access times are also satisfied. If the E and
G access times are not met, valid data will be
available after the latter of the Chip Enable Access
time (tELQV) or Output Enable Access time
(tGLQV).
The state of the eight three-state Data I/O signals
is controlled by E and G. If the outputs are activat-
ed before tAVQV, the data lines will be driven to an
indeterminate state until tAVQV. If the Address In-
puts are changed while E and G remain active,
output data will remain valid for Output Data Hold
time (tAXQX) but will go indeterminate until the next
Address Access.
Figure 6. READ Mode AC Waveforms
Note: WRITE Enable (W) = High.
Table 7. READ Mode AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C or –40 to 85°C; VCC = 4.75 to 5.5V or 4.5 to 5.5V (except where noted).
Symbol
Parameter(1)
M48Z02/M48Z12
Unit
–70
–150
–200
Min
Max
Min
Max
Min
Max
tAVAV
READ Cycle Time
70
150
200
ns
tAVQV
Address Valid to Output Valid
70
150
200
ns
tELQV
Chip Enable Low to Output Valid
70
150
200
ns
tGLQV
Output Enable Low to Output Valid
35
75
80
ns
tELQX
Chip Enable Low to Output Transition
5
10
10
ns
tGLQX
Output Enable Low to Output Transition
5
5
5
ns
tEHQZ
Chip Enable High to Output Hi-Z
25
35
40
ns
tGHQZ
Output Enable High to Output Hi-Z
25
35
40
ns
tAXQX
Address Transition to Output Transition
10
5
5
ns
AI01330
tAVAV
tAVQV
tAXQX
tELQV
tELQX
tEHQZ
tGLQV
tGLQX
tGHQZ
VALID
A0-A10
E
G
DQ0-DQ7
VALID




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