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FTLC1122SDNL Datasheet(PDF) 3 Page - Finisar Corporation.

Part No. FTLC1122SDNL
Description  10km Multi-rate 100Gb/s CFP2 Optical Transceiver Module
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Maker  FINISAR [Finisar Corporation.]
Homepage  http://www.finisar.com/home.php
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FTLC1122SDNL Datasheet(HTML) 3 Page - Finisar Corporation.

 
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FTLC1122SDNL Product Specification
 Finisar Corporation – 26-Mar-2018
Rev. C3
Page 3
Bottom Row Pin Descriptions
PIN
#
Name
I/O
Logic
Description
1
GND
2
TX_MCLKn
Supported.
3
TX_MCLKp
Supported.
4
GND
5
N.C.
6
N.C.
7
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
8
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
9
3.3V
3.3V Module Supply Voltage
10
3.3V
3.3V Module Supply Voltage
11
3.3V
3.3V Module Supply Voltage
12
3.3V
3.3V Module Supply Voltage
13
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
14
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
15
VND_IO_A
I/O
Module Vendor I/O A. Do Not Connect!
16
VND_IO_B
I/O
Module Vendor I/O B. Do Not Connect!
17
PRG_CNTL1
I
LVCMOS w/ PUR Programmable Control 1 set over MDIO
18
PRG_CNTL2
I
LVCMOS w/ PUR Programmable Control 2 set over MDIO
19
PRG_CNTL3
I
LVCMOS w/ PUR Programmable Control 3 set over MDIO
20
PRG_ALRM1
O
LVCMOS
Programmable Alarm 1 set over MDIO
21
PRG_ALRM2
O
LVCMOS
Programmable Alarm 2 set over MDIO
22
PRG_ALRM3
O
LVCMOS
Programmable Alarm 3 set over MDIO
23
GND
24
TX_DIS
I
LVCMOS w/ PUR Transmitter Disable for all lanes, "1" or NC = transmitter disabled, "0" = transmitter enabled
25
RX_LOS
O
LVCMOS
Receiver Loss of Optical Signal, "1": low optical signal, "0": normal condition
26
MOD_LOPWR
I
LVCMOS w/ PUR Module Low Power Mode. "1" or NC: module in low power (safe) mode, "0": power-on enabled
27
MOD_ABS
O
GND
Module Absent. "1" or NC: module absent, "0": module present, Pull Up Resistor on Host
28
MOD_RSTn
I
LVCMOS w/ PDR Module Reset. "0" resets the module, "1" or NC = module enabled, Pull Down Resistor in Module
29
GLB_ALRMn
O
LVCMOS
Global Alarm. “0": alarm condition in any MDIO Alarm register, "1": no alarm condition, Open Drain,
Pull Up Resistor on Host
30
GND
31
MDC
I/O
1.2V CMOS
Management Data I/O bi-directional data (electrical specs as per 802.3ae and ba)
32
MDIO
I
1.2V CMOS
Management Data Clock (electrical specs as per 802.3ae and ba)
33
PRTADR0
I
1.2V CMOS
MDIO Physical Port address bit 0
34
PRTADR1
I
1.2V CMOS
MDIO Physical Port address bit 1
35
PRTADR2
I
1.2V CMOS
MDIO Physical Port address bit 2
36
VND_IO_C
I/O
Module Vendor I/O C. Do Not Connect!
37
VND_IO_D
I/O
Module Vendor I/O D. Do Not Connect!
38
VND_IO_E
I/O
Module Vendor I/O E. Do Not Connect!
39
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
40
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
41
3.3V
3.3V Module Supply Voltage
42
3.3V
3.3V Module Supply Voltage
43
3.3V
3.3V Module Supply Voltage
44
3.3V
3.3V Module Supply Voltage
45
3.3V_GND
3.3V Module Supply Voltage Return Ground, internally connected to Signal Ground
46
GND
47
N.C.
48
N.C.
49
GND
50
RX_MCLKn
Supported.
51
RX_MCLKp
Supported.
52
GND


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