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CD54ACT74 Datasheet(PDF) 1 Page - Texas Instruments

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Part No. CD54ACT74
Description  DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54ACT74, CD74ACT74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCHS321 – DECEMBER 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Inputs Are TTL-Voltage Compatible
D Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
D Balanced Propagation Delays
D ±24-mA Output Drive Current
– Fanout to 15 F Devices
D SCR-Latchup-Resistant CMOS Process and
Circuit Design
D Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
description/ordering information
The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – E
Tube
CD74ACT74E
CD74ACT74E
55
°Cto125°C
SOIC
M
Tube
CD74ACT74M
ACT74M
–55
°C to 125°C
SOIC – M
Tape and reel
CD74ACT74M96
ACT74M
CDIP – F
Tube
CD54ACT74F3A
CD54ACT74F3A
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUTS
PRE
CLR
CLK
D
Q
Q
L
H
X
X
H
L
H
LX
XL
H
L
LX
X
H†
H†
H
H
HH
L
H
H
LL
H
H
H
L
X
Q0
Q0
† This configuration is nonstable; that is, it does not
persist when PRE or CLR returns to its inactive
(high) level.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
 2002, Texas Instruments Incorporated
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
VCC
2CLR
2D
2CLK
2PRE
2Q
2Q
CD54ACT74 ...F PACKAGE
CD74ACT74 ...E OR M PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.




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