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F2270NLGK Datasheet(PDF) 3 Page - Integrated Device Technology

Part # F2270NLGK
Description  Voltage Variable Attenuator
Download  29 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

F2270NLGK Datasheet(HTML) 3 Page - Integrated Device Technology

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F2270 Datasheet
© 2019 Integrated Device Technology, Inc.
3
January 16, 2019
Pin De sc ript ions
T a ble 1 .
Pin De sc ript ions
Number
Name
Description
1, 5 – 8, 12,
13
GND
Internally grounded. This pin must be grounded as close to the device as possible.
2, 4, 9, 11
NC
No internal connection. These pins can be left unconnected, have a voltage applied, or be connected to
ground (recommended).
3
RF1
RF Port 1. Matched to 75Ω. Since the RF pin internally has DC present, an external AC coupling capacitor
must be used. For low-frequency operation, increase the capacitor value to result in a low reactance at the
frequency of interest. An external series inductor of 2.4nH can also be used to improve the high frequency
match. This inductor, if used, should be placed as close to the device as possible.
10
RF2
RF Port 2. Matched to
75Ω. Since the RF pin internally has DC present, an external AC coupling capacitor
must be used. For low-frequency operation, increase the capacitor value to result in a low reactance at the
frequency of interest. An external series inductor of 2.8nH can also be used to improve the high frequency
match. This inductor, if used, should be placed as close to the device as possible.
14
VCTRL
Attenuator control voltage. Apply a voltage in the range specified in under “Recommended Operating
Conditions.” See the “Application Information” section for details about VCTRL. This pin is connected to an
internal 100kΩ series resistor that drives a biased voltage divider network.
15
VDD
Power supply input. Bypass to ground (GND) with capacitors as close as possible to the pin.
16
VMODE
Attenuator slope control. Set to logic LOW to enable negative attenuation slope (maximum attenuation at
maximum VCTRL). Set to logic HIGH to enable positive attenuation slope (maximum attenuation at minimum
VCTRL). This pin is
internally connected to a 170kΩ pull-down resistor to ground.
– EPAD
Exposed paddle. Internally connected to ground. Solder this exposed paddle to a printed circuit board (PCB)
pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes.
These multiple ground vias are also required to achieve the specified RF performance.


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