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74LVCH16373ADL Datasheet(PDF) 6 Page - NXP Semiconductors |
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74LVCH16373ADL Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 17 page 2003 Dec 08 6 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state 74LVC16373A; 74LVCH16373A handbook, halfpage to internal circuit MGU771 VCC data input Fig.5 Bushold circuit. RECOMMENDED OPERATING CONDITIONS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 60 °C the value of Ptot derate linearly with 5.5 mW/K. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage for maximum speed performance 2.7 3.6 V for low voltage applications 1.2 3.6 V VI input voltage 0 5.5 V VO output voltage output HIGH or LOW state 0 VCC V output 3-state 0 5.5 V Tamb operating ambient temperature in free-air −40 +125 °C tr,tf input rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +6.5 V IIK input diode current VI <0 −−50 mA VI input voltage note 1 −0.5 +6.5 V IOK output diode current VO >VCC or VO <0 −±50 mA VO output voltage output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V output 3-state; note 1 −0.5 +6.5 V IO output source or sink current VO =0toVCC −±50 mA ICC, IGND VCC or GND current −±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation Tamb = −40 to +125 °C; note 2 − 500 mW |
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