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ISPLSI2064V-80LJ44 Datasheet(PDF) 9 Page - Lattice Semiconductor |
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ISPLSI2064V-80LJ44 Datasheet(HTML) 9 Page - Lattice Semiconductor |
9 / 14 page 9 Specifications ispLSI 2064V Pin Description Input/Output Pins — These are the general purpose I/O pins used by the logic array. NAME Table 2-0002A/2064V 100-PIN TQFP PIN NUMBERS DESCRIPTION 17, 22, 27, 32, 40, 45, 49, 55, 67, 72, 77, 82, 90, 95, 99, 5, 62, 10, 11 15 16 37 87 59 14, 12, 4, 31, 54, 75, 100 18, 23, 28, 33, 41, 46, 51, 56, 68, 73, 78, 83, 91, 96, 1, 6, 13 65, 39, 36, 9, 38, 64, 81 19, 24, 29, 34, 42, 47, 52, 57, 69, 74, 79, 84, 92, 97, 2, 7, 60 61, 63, 21, 44, 66, 88, I/O 0 - I/O 3 I/O 4 - I/O 7 I/O 8 - I/O 11 I/O 12 - I/O 15 I/O 16 - I/O 19 I/O 20 - I/O 23 I/O 24 - I/O 27 I/O 28 - I/O 31 I/O 32 - I/O 35 I/O 36 - I/O 39 I/O 40 - I/O 43 I/O 44 - I/O 47 I/O 48 - I/O 51 I/O 52 - I/O 55 I/O 56 - I/O 59 I/O 60 - I/O 63 GOE 0, GOE 1 Y0, Y1, Y2 RESET ispEN TDI/IN 0 TMS/IN 1 TDO/IN 2 TCK/IN 3 GND VCC NC1 20, 26, 30, 35, 43, 48, 53, 58, 70, 76, 80, 85, 93, 98, 3 8 86 89 25, 50, 71, 94, Global Output Enable Input Pins Dedicated Clock input. This clock input is connected to one of the clock inputs of all the GLBs in the device. Active Low (0) Reset pin which resets all registers in the device. Input — Dedicated in-system programming enable input pin. This pin is brought low to enable the programming mode. The TMS, TDI, TDO and TCK controls become active. Input — This pin performs two functions. When ispEN is logic low, it functions as an input pin to load programming data into the device. TDI/IN 0 also is used as one of the two control pins for the ISP state machine. When ispEN is high, it functions as a dedicated input pin. Input — This pin performs two functions. When ispEN is logic low, it functions as a pin to control the operation of the ISP state machine. When ispEN is high, it functions as a dedicated input pin. Output/Input — This pin performs two functions. When ispEN is logic low, it functions as an output pin to read serial shift register data. When ispEN is high, it functions as a dedicated input pin. Input — This pin performs two functions. When ispEN is logic low, it functions as a clock pin for the Serial Shift Register. When ispEN is high, it functions as a dedicated input pin. 84-PIN PLCC PIN NUMBERS 26, 30, 34, 38, 45, 49, 53, 57, 68, 72, 76, 80, 3, 7, 11, 15 64, 19, 20 24 25 43 1 61 27, 31, 35, 39, 46, 50, 54, 58, 69, 73, 77, 81, 4 8, 12, 16, 22 67, 28, 32, 36, 40, 47, 51, 55, 59, 70, 74, 78, 82, 5, 9, 13, 17, 62 29, 33, 37, 41, 48, 52, 56, 60, 71, 75, 79, 83, 6, 10, 14, 18 23, 2, 66 44, 21, 63, 42, 84 65 Ground (GND) Vcc No Connect. 1. NC pins are not to be connected to any active signals, VCC or GND. |
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