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MVTX2804AG Datasheet(PDF) 2 Page - Zarlink Semiconductor Inc

Part # MVTX2804AG
Description  8-Port 1000 Mbps Ethernet Distributed Switch
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

MVTX2804AG Datasheet(HTML) 2 Page - Zarlink Semiconductor Inc

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MVTX2804
Data Sheet
2
Zarlink Semiconductor Inc.
QoS Support
Description
The MVTX2800AG family is a group of 8-port 1000 Mbps non-blocking Ethernet switch chips with on-chip address
memory. A single chip provides a maximum of eight 1000 Mbps ports and a dedicated CPU interface with a 16/8-bit
bus for managed and unmanaged switch applications. The VTX2800 family consists of the following four products:
• VTX2804 8 Gigabit ports Managed
• VTX2803 8 Gigabit ports Unmanaged
• VTX2802 4 Gigabit ports Managed
• VTX2801 4 Gigabit ports Unmanaged
The MVTX2804AG supports up to 64K MAC addresses to aggregate traffic from multiple wiring closet stacks. The
centralized shared-memory architecture allows a very high performance packet-forwarding rate of 11.904M packets
per second at full wire speed. The chip is optimized to provide a low-cost, high performance workgroup, and wiring
closet, layer 2 switching solution with 8 Gigabit Ethernet ports.
Two Frame Buffer Memory domains utilize cost effective, high-performance ZBT-SRAM with aggregated bandwidth
of 16Gbps to support full wire speed on all external ports simultaneously.
With Strict priority, Delay Bounded, and WRR transmission scheduling, plus WRED memory congestion scheme,
the chip provides powerful QoS functions for convergent network multimedia and mission-critical applications. The
chip provides 8 transmission priorities and 2 level drop precedence. Traffic is assigned its transmission priority and
dropping precedence based on the frame VLAN Tag priority or DS/TOS fields in IP packets.
IP multicast snooping provides up to 64k simultaneous IP Multicast groups. With 4K IEEE 802.1Q VLANs, the
MVTX2804AG provides the ability to logically group users to control multicast traffic.
Supports IEEE 802.1p/Q Quality of Service with
8 Priority
Buffer Management: reserve buffers on per class
and per port basis
Port-based Priority: VLAN Priority with Tagged
frame can be overwritten by the priority of PVID
QoS features can be configured on a per port
basis
Packet Filtering and Port Security
Static addressing filtering for source and/or
destination MAC address
Static learned MAC addresses will not be aged
out
Secure mode per port: Prevent learning for port
in a secure mode
Support per MAC per Port filtering
Full Duplex Ethernet IEEE 802.3x Flow Control
Provides Ethernet Multicast and Broadcast
Control
4 Port Trunking groups, 8 ports per group
(Trunking can be based on source MAC and/or
destination MAC and source port)
LED signals provided by a serial or parallel
interface
CPU interface supports 16/8-bit CPU bus in
managed mode and a synchronous Serial Interface
and I2C interface in unmanaged mode
SNMP/RMON support with CPU
Built-in MIB counter
Spanning tree with CPU
Multiple Spanning trees (Per Spanning Tree Per
VLAN)
Hardware auto-negotiation through serial
management interface (MDIO) for Gigabit Ethernet
ports, supports 10/100/1000 Mbps
BIST for internal and external SRAM-ZBT
•I2C EEPROM or synchronous serial port for
configuration
Packaged in 596-pin BGA


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