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MVTX2803 Datasheet(PDF) 3 Page - Zarlink Semiconductor Inc

Part # MVTX2803
Description  Unmanaged 8-Port 1000 Mbps Ethernet Switch
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

MVTX2803 Datasheet(HTML) 3 Page - Zarlink Semiconductor Inc

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MVTX2803
Data Sheet
3
Zarlink Semiconductor Inc.
Description
The MVTX2800 family is a group of 1000 Mbps non-blocking Ethernet switch chips with on-chip address memory.
A single chip provides a maximum of eight 1000 Mbps ports and a dedicated CPU interface with a 16/8 bit bus for
managed and unmanaged switch applications. The MVTX2800 family consists of the following four products:
• MVTX2804 8 Gigabit ports Managed
•MVTX2803 8 Gigabit ports Unmanaged
•MVTX2802 4 Gigabit ports Managed
• MVTX2801 4 Gigabit ports Unmanaged
The MVTX2803 supports up to 64K MAC addresses to aggregate traffic from multiple wiring closet stacks. The
centralized shared-memory architecture allows a very high performance packet-forwarding rate of 11.904M packets
per second at full wire speed. The chip is optimized to provide a low-cost, high performance workgroup, and wiring
closet, layer 2 switching solution with 8 Gigabit Ethernet ports.
Two Frame Buffer Memory domains utilize cost effective, high–performance ZBT-SRAM with aggregated bandwidth
of 16Gbps to support full wire speed on all external ports simultaneously.
With Strict priority, Delay Bounded, and WRR transmission scheduling, plus WRED memory congestion scheme,
the chip provides powerful QoS functions for convergent network multimedia and mission-critical applications. The
chip provides 8 transmission priorities and 2 level drop precedence. Traffic is assigned its transmission priority and
dropping precedence based on the frame VLAN Tag priority.
The MVTX2803AG supports port trunking/load sharing on the 1000 Mbps ports with fail-over capability. The port
trunking/load sharing can be used to group ports between interlinked switches to increase the effective network
bandwidth.
In full-duplex mode, IEEE 802.3x flow control is provided. The Physical Coding Sublayer (PCS) is integrated on-
chip to provide a direct 10-bit GMII interface, or the PCS can be bypassed to provide an interface to existing fiber-
based Gigabit Ethernet transceivers.
The MVTX2803AG is fabricated using 0.25
µm technology. Inputs, however, are 3.3V tolerant and the outputs are
capable of directly interfacing to LVTTL levels. The MVTX2803AG is packaged in a 596-pin Ball Grid Array
package.


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