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M41T60 Datasheet(PDF) 8 Page - STMicroelectronics

Part # M41T60
Description  Serial Access Real-Time Clock
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M41T60 Datasheet(HTML) 8 Page - STMicroelectronics

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M41T60
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READ Mode
In this mode, the master reads the M41T60 slave
after setting the slave address (see Figure 9). Fol-
lowing the WRITE Mode Control Bit (R/W = 0) and
the Acknowledge Bit, the word address An is writ-
ten to the on-chip address pointer. Next the
START condition and slave address are repeated,
followed by the READ Mode Control Bit (R/W =1).
At this point, the master transmitter becomes the
master receiver. The data byte which was ad-
dressed will be transmitted and the master receiv-
er will send an Acknowledge Bit to the slave
transmitter. The address pointer is only increment-
ed on reception of an Acknowledge Bit. The
M41T60 slave transmitter will now place the data
byte at address An+1 on the bus. The master re-
ceiver reads and acknowledges the new byte and
the address pointer is incremented to An+2.
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter.
The system-to-user transfer of clock data will be
halted whenever the address being read is a clock
address (0h to 6h). The update will resume due to
a Stop Condition or when the pointer increments to
any non-clock address (7h).
An alternate READ Mode may also be implement-
ed, whereby the master reads the M41T60 slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer (see Figure 11., page 9).
WRITE Mode
In this mode the master transmitter transmits to
the M41T60 slave receiver. Bus protocol is shown
in Figure 12., page 9. Following the START condi-
tion and slave address, a logic '0' (R/W = 0) is
placed on the bus and indicates to the addressed
device that word address An will follow and is to be
written to the on-chip address pointer. The data
word to be written to the memory is strobed in next
and the internal address pointer is incremented to
the next address location on the reception of an
acknowledge clock. The M41T60 slave receiver
will send an acknowledge clock to the master
transmitter after it has received the slave address
and again after it has received the word address
and each data byte (see Figure 9).
Figure 9. Slave Address Location
AI00602
R/W
SLAVE ADDRESS
START
A
0
100
0
11


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