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CC3135 Datasheet(PDF) 66 Page - Texas Instruments

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Part No. CC3135
Description  SimpleLink Wi-Fi, Dual-Band Network Processor, solution for MCU applications
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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CC3135 Datasheet(HTML) 66 Page - Texas Instruments

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CC3135
SWAS037 – JANUARY 2019
www.ti.com
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Product Folder Links: CC3135
Applications, Implementation, and Layout
Copyright © 2019, Texas Instruments Incorporated
7.2.5
RF Interface Guidelines
The following guidelines are for the RF interface. Follow guidelines specified in the vendor-specific
antenna design guides (including placement of the antenna). Also see CC3135 and CC3235 SimpleLink™
Wi-Fi® and IoT Solution Layout Guidelines for general antenna guidelines.
Ensure that the antenna is matched for 50-Ω. A π-matching network is recommended. Ensure that the
π pad is available for tuning the matching network after PCB manufacture.
A DC blocking capacitor is required before the antenna. If the antenna matching network contains a
series capacitor, this is sufficient to meet the requirement.
Ensure that the area underneath the BPFs pads have a solid plane on layer 2 and that the minimum
filter requirements are met.
Ensure that the area underneath the RF switch pads have a solid plane on layer 2 and that the
minimum switch isolation requirements are met.
Ensure that the area underneath the diplexer pads have a solid plane on layer 2 and that the minimum
diplexer requirements are met.
Verify that the Wi-Fi RF trace is a 50-Ω, impedance-controlled trace with a reference to solid ground.
The RF trace bends must be made with gradual curves. Avoid 90-degree bends.
The RF traces must not have sharp corners.
There must be no traces or ground under the antenna section.
The RF traces must have via stitching on the ground plane beside the RF trace on both sides.
For optimal antenna performance, ensure adequate ground plane around the antenna on all layers.
Ensure RF connectors for conducted testing are isolated from the top layer ground using vias.
Maintain a controlled pad to trace shapes using filleted edges if necessary to avoid mismatch.
Diplexers, switches, BPF, and other elements on the RF route should be isolated from the top layer
ground using vias.


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