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MSM5260 Datasheet(PDF) 8 Page - OKI electronic componets

Part # MSM5260
Description  80-DOT COMMON/SEGMENT DRIVER
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Manufacturer  OKI [OKI electronic componets]
Direct Link  http://www.oki.com
Logo OKI - OKI electronic componets

MSM5260 Datasheet(HTML) 8 Page - OKI electronic componets

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MSM5260
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FUNCTIONAL DESCRIPTION
Pin Functional Description
•DI1
The data input pin for the 80-bit shift register (between 1st to 80th bit). The display data is
clocked in to this pin. (Positive logic)
•CP
Clock pulse input pin for 80-bit shift register. The data is shifted to the 80-bit shift register at
the falling edge of the clock pulse. A data setup time (tSETUP) and a data hold time (tHOLD)
are required between a DI1 signal and a clock pulse.
Clock pulse rise time (tr) and clock pulse fall time (tf) should be a maximum of 50ns
respectively.
•DO80
The 80th bit output from the 80-bit shift register.
The data which is input from DI1 is clocked out with the delay in the number of the bits of the
shift register.
When extending the number of characters, this pin is used to connect to the next MSM5260
in cascade.
• LOAD
The signal for latching the shift register contents is input from this pin.
When LOAD pin is set at "H" level, the shift register contents are transferred to the 80-bit 4-
level driver through the 80-bit level shifter.
When LOAD pin is set at "L" level, the last display output data (O1 to O80), which was
transferred when LOAD pin was at "H" level, is held.
•DF
Synchronous signal input pin for alternate signal for LCD driving.


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