ADC12DJ3200_19 datasheet(36/155 Pages) TI1

Part #	ADC12DJ3200

Description	6.4-GSPS Single Channel or 3.2-GSPS Dual Channel, 12-bit, RF-Sampling Analog-to-Digital Converter (ADC)

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Manufacturer	TI1 [Texas Instruments]

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36 / 155 page

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Frequency (Hz) - FFT Plot

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8E+8

1.6E+9

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SNR = 57.3 dBFS

SFDR = 67.6 dBFS

ENOB = 8.71 Bits

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Frequency (Hz) - FFT Plot

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4E+8

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SNR = 57.1 dBFS

SFDR = 73.9 dBFS

ENOB = 9.13 Bits

D142

36

ADC12DJ3200

SLVSD97 – JUNE 2017

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Product Folder Links: ADC12DJ3200

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Typical Characteristics (continued)

Typical values at TA = +25°C, VA19 = 1.9V, VA11 = VD11 = 1.1V, default full-scale voltage (FS_RANGE_A = FS_RANGE_B

= 0xA000), input signal applied to INA+/- in single channel modes, fIN = 347 MHz, AIN = -1dBFS, fCLK = maximum rated clock

frequency, filtered, 1-Vpp sine-wave clock, JMODE=1, background calibration, unless otherwise noted. SNR results exclude

DC, HD2 to HD9 and interleaving spurs. SINAD, ENOB and SFDR results exclude DC and fixed frequency interleaving spurs.

JMODE1

FIN = 8200 MHz

FG Calibration

Figure 58. Single Tone FFT at AIN = -16 dBFS

JMODE3

FIN = 8200 MHz

FG Calibration

Figure 59. Single Tone FFT at AIN = -16 dBFS

JMODE2

FCLK = 3200 MHz

FIN = 3199.9 MHz

Figure 60. Background Calibration Core Transition - AC

Signal

JMODE2

FCLK = 3200 MHz

FIN = 3199.9 MHz

Figure 61. Background Calibration Core Transition - AC

Signal Zoomed

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