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MCF5272 Datasheet(PDF) 6 Page - Motorola, Inc |
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MCF5272 Datasheet(HTML) 6 Page - Motorola, Inc |
6 / 550 page vi MCF5272 User’s Manual MOTOROLA CONTENTS Paragraph Number Title Page Number 2.2 Programming Model ........................................................................................... 2-5 2.2.1 User Programming Model .............................................................................. 2-6 2.2.1.1 Data Registers (D0–D7) ............................................................................. 2-6 2.2.1.2 Address Registers (A0–A6) ........................................................................ 2-6 2.2.1.3 Stack Pointer (A7, SP) ................................................................................ 2-7 2.2.1.4 Program Counter (PC) ................................................................................ 2-7 2.2.1.5 Condition Code Register (CCR) ................................................................. 2-7 2.2.1.6 MAC Programming Model......................................................................... 2-8 2.2.2 Supervisor Programming Model..................................................................... 2-8 2.2.2.1 Status Register (SR).................................................................................... 2-8 2.2.2.2 Vector Base Register (VBR) ...................................................................... 2-9 2.2.2.3 Cache Control Register (CACR) ................................................................ 2-9 2.2.2.4 Access Control Registers (ACR0–ACR1)................................................ 2-10 2.2.2.5 ROM Base Address Register (ROMBAR) ............................................... 2-10 2.2.2.6 RAM Base Address Register (RAMBAR) ............................................... 2-10 2.2.2.7 Module Base Address Register (MBAR) ................................................. 2-10 2.3 Integer Data Formats......................................................................................... 2-10 2.4 Organization of Data in Registers..................................................................... 2-10 2.4.1 Organization of Integer Data Formats in Registers ...................................... 2-11 2.4.2 Organization of Integer Data Formats in Memory ....................................... 2-12 2.5 Addressing Mode Summary ............................................................................. 2-12 2.6 Instruction Set Summary................................................................................... 2-13 2.6.1 Instruction Set Summary .............................................................................. 2-16 2.7 Instruction Timing ............................................................................................ 2-19 2.7.1 MOVE Instruction Execution Times ............................................................ 2-20 2.7.2 Execution Timings—One-Operand Instructions .......................................... 2-22 2.7.3 Execution Timings—Two-Operand Instructions.......................................... 2-23 2.7.4 Miscellaneous Instruction Execution Times................................................. 2-24 2.7.5 Branch Instruction Execution Times ............................................................ 2-25 2.8 Exception Processing Overview ....................................................................... 2-26 2.8.1 Exception Stack Frame Definition................................................................ 2-28 2.8.2 Processor Exceptions .................................................................................... 2-29 Chapter 3 Hardware Multiply/Accumulate (MAC) Unit 3.1 Overview............................................................................................................. 3-1 3.1.1 MAC Programming Model ............................................................................. 3-2 3.1.2 General Operation........................................................................................... 3-3 3.1.3 MAC Instruction Set Summary ...................................................................... 3-4 3.1.4 Data Representation ........................................................................................ 3-5 3.2 MAC Instruction Execution Timings.................................................................. 3-5 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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