Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

EQJF Datasheet(PDF) 1 Page - EUROQUARTZ limited

Part No. EQJF
Description  High Frequency - Ultra-Low Jitter 50MHz to 2100MHz
Download  4 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  EUROQUARTZ [EUROQUARTZ limited]
Homepage  http://www.euroquartz.co.uk
Logo 

EQJF Datasheet(HTML) 1 Page - EUROQUARTZ limited

   
Zoom Inzoom in Zoom Outzoom out
 1 / 4 page
background image
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001
info@euroquartz.co.uk
www.euroquartz.co.uk
EURO QUARTZ
High Frequency - Ultra-Low Jitter
EQJF Series oscillators, Ultra-low Jitter
Outputs LVPECL, LVDS, CML Differential outputs: 50~2100MHz
HCSL Differential Outputs: 50~700MHz
RMS phase jitter 150fs ftypical
ITAR Free
FEATURES
EQJF SERIES OSCILLATORS
50MHz to 2100MHz
Output Logic Type
LVPECL
LVDS
CML
HCSL
Frequency Range
50 ~ 2100MHz
50 ~ 2100MHz
50 ~ 2100MHz
50 ~ 700MHz
Load
50Ω into VDD-2V
or Thevenin
equivalent
100Ω between
OUT and OUTN
50Ω to VDD
50Ω to GND
Power Supply Voltage
(VDD)
+2.5V±10% or
+3.3V±10%
+2.5V±10%
+3.3V±10%
+1.8V±5%
+2.5V±10%
+3.3V±10%
+1.8V±5% or
+2.5V±10% or
+3.3V±10%
Output ‘HIGH’ Voltage
VDD-1.165V min.
VDD-0.8V max.
VDD: 1.4V typical
VDD: 1.6V max.
VDD: -0.085V min.
VDD: = max.
VDD: 0.66V min.
VDD: 1.15V max.
Output ‘LOW’ Voltage
VDD: -2.0V min.
VDD: -1.55V max.
VDD: 1.1V typical
VDD: 0.9V min.
VDD: -0.6V min.
VDD: -0.32V min.
VDD: 0.0V min.
VDD: 0.15V min.
GENERAL SPECIFICTIONS
Frequency Stability Codes
Frequency stability over operating
temp. Range
±25ppm
±50ppm
±100ppm
If non-standard please enter
the desired stability after the
‘C’ or ‘I’
Example:
'C20’ is ±20ppm over
-10° to +70°C.
Commercial -10° to +70°C
A
B
C
Industrial -40° to 85°C
D
E
F
Ageing at Ta = 25°C
±3ppm max. first year; 2±ppm max. per year thereafter
Duty Cycle
50%±5%
50%±5%
50%±5%
50%±5%
Rise Time (Tr)
Fall Time (Tf)
(20% ~ 80% waveform)
0.35ns max.
0.35ns max.
0.35ns max.
0.4ns max.
Current Consumption
at VDD = 3.3V
100mA typical
120mA max.
75mA typical
90mA max.
70mA typical
85mA max.
94mA typical
115mA max.
Current with output
Disabled
99mA max.
74mA max.
69mA max.
93mA max.
Phase Jitter, rms:
150fs typical, 300fs max.
(12kHz to 20MHz)
Start-up Time:
5ms typical; 10ms max.
Output Enable Function on Pad 2
OE Control
To Enable:
0.8% of VDD min. or no connection
To Disable:
0.2% of VDD max. (high impedance)
Output Enable Time:
2.5ms max.
Output Disable Time:
10µs max.
SPECIFICATION
Page 1 of 4
ITAR FREE


Html Pages

1  2  3  4 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn