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3D7303 Datasheet(PDF) 1 Page - Data Delay Devices, Inc.

Part No. 3D7303
Description  MONOLITHIC TRIPLE FIXED DELAY LINE
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Maker  DATADELAY [Data Delay Devices, Inc.]
Homepage  http://www.datadelay.com
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3D7303 Datasheet(HTML) 1 Page - Data Delay Devices, Inc.

   
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3D7303
Doc #96001
DATA DELAY DEVICES, INC.
1
12/2/96
3 Mt. Prospect Ave. Clifton, NJ 07013
MONOLITHIC TRIPLE
FIXED DELAY LINE
(SERIES 3D7303)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Delay range: 10 through 500ns
Delay tolerance: 2% or 1.0ns
Temperature stability:
±3% typical (0C-70C)
Vdd stability:
±1% typical (4.75V-5.25V)
Minimum input pulse width: 20% of total
delay
14-pin DIP available as drop-in replacement for
hybrid delay lines
FUNCTIONAL DESCRIPTION
The 3D7303 Triple Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains three matched,
independent delay lines. Delay values can range from 10ns through
500ns. The input is reproduced at the output without inversion,
shifted in time as per the user-specified dash number. The 3D7303
is TTL- and CMOS-compatible, capable of driving ten 74LS-type
loads, and features both rising- and falling-edge accuracy.
The all-CMOS 3D7303 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 8-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC.
data
delay
devices, inc.
®
®
3
PACKAGES
8
7
6
5
1
2
3
4
I1
I2
I3
GND
VDD
O1
O2
O3
3D7303M DIP
3D7303H Gull-Wing
(300 Mil)
1
2
3
4
8
7
6
5
I1
I2
I3
GND
VDD
O1
O2
O3
3D7303Z SOIC
(150 Mil)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
I1
N/C
I2
N/C
I3
N/C
GND
VDD
N/C
O1
N/C
O2
N/C
O3
3D7303
DIP
3D7303G Gull-Wing
3D7303K Unused pins
removed
(300 Mil)
PIN DESCRIPTIONS
I1
Delay Line 1 Input
I2
Delay Line 2 Input
I3
Delay Line 3 Input
O1
Delay Line 1 Output
O2
Delay Line 2 Output
O3
Delay Line 3 Output
VCC
+5 Volts
GND
Ground
N/C
No Connection
TABLE 1: PART NUMBER SPECIFICATIONS
PART NUMBER
DELAY
INPUT RESTRICTIONS
DIP-8
3D7303M
3D7303H
SOIC-8
3D7303Z
DIP-14
3D7303
3D7303G
DIP-14
3D7303K
PER LINE
(ns)
Max Operating
Frequency
Absolute Max
Oper. Freq.
Min Operating
Pulse Width
Absolute Min
Oper. P.W.
-10
-10
-10
-10
10
± 1.0
33.3 MHz
100.0 MHz
15.0 ns
5.0 ns
-15
-15
-15
-15
15
± 1.0
22.2 MHz
100.0 MHz
22.5 ns
5.0 ns
-20
-20
-20
-20
20
± 1.0
16.7 MHz
100.0 MHz
30.0 ns
5.0 ns
-25
-25
-25
-25
25
± 1.0
13.3 MHz
83.3 MHz
37.5 ns
6.0 ns
-30
-30
-30
-30
30
± 1.0
11.1 MHz
71.4 MHz
45.0 ns
7.0 ns
-40
-40
-40
-40
40
± 1.0
8.33 MHz
62.5 MHz
60.0 ns
8.0 ns
-50
-50
-50
-50
50
± 1.0
6.67 MHz
50.0 MHz
75.0 ns
10.0 ns
-100
-100
-100
-100
100
± 2.0
3.33 MHz
25.0 MHz
150.0 ns
20.0 ns
-200
-200
-200
-200
200
± 4.0
1.67 MHz
12.5 MHz
300.0 ns
40.0 ns
-300
-300
-300
-300
300
± 6.0
1.11 MHz
8.33 MHz
450.0 ns
60.0 ns
-400
-400
-400
-400
400
± 8.0
0.83 MHz
6.25 MHz
600.0 ns
80.0 ns
-500
-500
-500
-500
500
± 10.0
0.67 MHz
5.00 MHz
750.0 ns
100.0 ns
NOTE:
Any delay between 10 and 500 ns not shown is also available.
©
©1996 Data Delay Devices


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