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MSM51V4265E Datasheet(PDF) 3 Page - OKI electronic componets |
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3 / 15 page FEDD51V4265E-01 1Semiconductor MSM51V4265E 3/15 BLOCK DIAGRAM FUNCTION TABLE Input Pin DQ Pin RAS LCAS UCAS WE OE DQ1-DQ8 DQ9-DQ16 Function Mode H * * * * High-Z High-Z Standby L H H * * High-Z High-Z Refresh LL H H L DOUT High-Z Lower Byte Read LH LH L High-Z DOUT Upper Byte Read LL L H L DOUT DOUT Word Read LL H L H DIN Don’t Care Lower Byte Write L H L L H Don’t Care DIN Upper Byte Write LL LL H DIN DIN Word Write L L L H H High-Z High-Z * : “H” or “L” A0 – A8 8 8 8 8 8 8 8 16 8 16 9 9 9 9 Timing Generator Column Address Buffers I/O Controller Internal Address Counter Row Address Buffers Refresh Control Clock I/O Controller Column Decoders Sense Amplifiers Memory Cells Word Drivers Row Deco- ders I/O Selector Input Buffers Input Buffers Output Buffers Output Buffers DQ1 – DQ8 DQ9 – DQ16 OE WE RAS LCAS UCAS VCC VSS On Chip V BB Generator |
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