LTC3204-3.3/LTC3204-5/

LTC3204B-3.3/LTC3204B-5

10

3204fa

0603

0603

0603

GND

3204 F04

SHDN

Ceramic Capacitors

Ceramic capacitors of different materials lose their capaci-

tancewithhighertemperatureandvoltageatdifferentrates.

For example, a capacitor made of X5R or X7R material

will retain most of its capacitance from –40°C to 85°C

whereasaZ5UorY5Vstylecapacitorwillloseconsiderable

capacitance over that range. Z5U and Y5V capacitors may

also have a poor voltage coefficient causing them to lose

60% or more of their capacitance when the rated voltage

isapplied.Thereforewhencomparingdifferentcapacitors,

it is often more appropriate to compare the amount of

achievable capacitance for a given case size rather than

discussing the specified capacitance value. For example,

over rated voltage and temperature conditions, a 1µF 10V

Y5V ceramic capacitor in a 0603 case may not provide any

more capacitance than a 0.22µF 10V X7R capacitor avail-

able in the same 0603 case. In fact, for most LTC3204-3.3/

LTC3204-5/LTC3204B-3.3/LTC3204B-5applications,these

capacitors can be considered roughly equivalent. The

capacitor manufacturer’s data sheet should be consulted

to ensure the desired capacitance at all temperatures and

voltages.

Below is a list of ceramic capacitor manufacturers and

how to contact them:

AVX

www.avxcorp.com

Kemet

www.kemet.com

Murata

www.murata.com

Taiyo Yuden

www.t-yuden.com

Vishay

www.vishay.com

TDK

www.component.tdk.com

Layout Considerations

Due to the high switching frequency and high transient

currentsproducedbyLTC3204-3.3/LTC3204-5/LTC3204B-

3.3/LTC3204B-5, careful board layout is necessary for

optimum performance. A true ground plane and short

connections to all the external capacitors will improve per-

formanceandensureproperregulationunderallconditions.

Figure 4 shows an example layout for the LTC3204-3.3/

LTC3204-5/LTC3204B-3.3/LTC3204B-5.

Thermal Management

For higher input voltages and maximum output cur-

rent, there can be substantial power dissipation in the

LTC3204-3.3/LTC3204-5/LTC3204B-3.3/LTC3204B-5. If

the junction temperature increases above approximately

160°C, the thermal shutdown circuitry will automatically

deactivate the output. To reduce the maximum junction

temperature, a good thermal connection to the PC board

is recommended. Connecting the GND pin (Pin 1) and

the exposed pad of the DFN package (Pin 7) to a ground

plane under the device on two layers of the PC board

can reduce the thermal resistance of the package and PC

board considerably.

Derating Power at High Temperatures

To prevent an overtemperature condition in high power

applications, Figure 5 should be used to determine the

maximumcombinationofambienttemperatureandpower

dissipation.

The power dissipated in the LTC3204-3.3/LTC3204-5/

LTC3204B-3.3/LTC3204B-5 should always fall under the

line shown for a given ambient temperature. The power

dissipationintheLTC3204-3.3/LTC3204-5/LTC3204B-3.3/

LTC3204B-5 is given by the expression:

P

V

V

I

D

IN

OUT

OUT

= (

–

)•

2

This derating curve assumes a maximum thermal resis-

Figure 4. Recommended Layout

APPLICATIO S I FOR ATIO