Preliminary datasheet
19
Version: DM9102D-DS-P02
Jan. 14, 2005
6.1.12 Power Management Register (xxxxxx50H~PCIPMR)
31
16 15
0
87
Power Management Capabilities
Next Item Pointer
Capability Identifier
PMC
Next Item Pointer
Capability ID
Bit
Default
Type
Description
31:27
11000
RO
PME_ Support
This field indicates that the power states in which the function may assert PME#. A
value of 0 for any bit indicates that the function is not capable of asserting the PME#
signal while in that power state
bit27
PME# support D0
bit28
PME# support D1
bit29
PME# support D2
bit30
PME# support D3(hot)
bit31
PME# support D3(cold)
DM9102D’s bit31~27=11000 indicates PME# can be asserted from D3(hot) &
D3(cold)
These bits can be load from EEPROM word 7 bit [7:3]
26:25
00
RO
Reserved
These two bits can be load from EEPROM word 7 bit [1:0]
24:22
011
RO
Aux_ Current
This field reports the 3.3Vaux auxiliary current requirement for the PCI function.
The default value of this field is 011 means 160mA and it can be loaded from
EEPROM word 4 bit [15:13] if EEPROM word 4 bit [9] is 1
21
1
RO
A “1” indicates that the function requires a device specific initialization sequence
following transition to the D0 uninitialized state
This bit can be load from EEPROM word 7 bit [2]
20
0
RO
Reserved
19
0
RO
PME# Clock
“0” indicates that no PCI clock is required for the function to generate PME#
18:16
010
RO
Version
A default value of 010 indicates that this function complies with the Revision 1.1 of
the PCI Power Management Interface Specification
This value can be loaded from EEPROM word 4 bit [12:10] if EEPROM word 4 bit
[9] is 1
15:8
00H
RO
Next Item Pointer
The offset into the function’s PCI Configuration Space pointing to the location of
next item in the function’s capability list is “00H”
7:0
01H
RO
Capability Identifier
When “01H” indicates the linked list item as being the PCI Power Management
Registers
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