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74LVX273 Datasheet(PDF) 4 Page - STMicroelectronics

Part No. 74LVX273
Description  LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR (5V TOLERANT INPUTS)
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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74LVX273 Datasheet(HTML) 4 Page - STMicroelectronics

 
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Table 7: Dynamic Switching Characteristics
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
± 0.3V
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
VOLP
Dynamic Low Voltage
Quiet Output (note 1, 2)
3.3
CL = 50 pF
0.3
0.8
V
VOLV
-0.8
-0.3
VIHD
Dynamic High Voltage
Input (note 1, 3)
3.3
2.0
VILD
Dynamic Low Voltage
Input (note 1, 3)
3.3
0.8
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
CL
(pF)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tPLH
tPHL
Propagation Delay
Time
CK to Q
2.7
15
9.0
16.9
1.0
20.5
1.0
22.0
ns
2.7
50
11.5
20.4
1.0
24.0
1.0
25.5
3.3(*)
15
7.1
11.0
1.0
13.0
1.0
14.5
3.3(*)
50
9.6
14.5
1.0
16.5
1.0
18.0
tPHL
Propagation Delay
Time
CLEAR to Q
3.3(*)
15
9.3
17.6
1.0
20.5
1.0
22.0
ns
3.3(*)
50
11.8
21.1
1.0
24.0
1.0
25.5
5.0(**)
15
7.3
11.5
1.0
13.5
1.0
15.5
5.0(**)
50
9.8
15.0
1.0
17.0
1.0
18.0
tW(L)
CLEAR pulse Width,
HIGH
2.7
50
5.0
6.0
6.0
ns
3.3(*)
5.0
5.0
5.0
tW
CLOCK pulse Width,
HIGH
2.7
50
5.5
6.5
6.5
ns
3.3(*)
5.0
5.0
5.0
tS
Setup Time Q to
CLOCK HIGH or LOW
2.7
50
5.5
6.5
6.5
ns
3.3(*)
4.5
4.5
4.5
th
Hold Time Q to
CLOCK HIGH or LOW
2.7
50
1.0
1.0
1.0
ns
3.3(*)
1.0
1.0
1.0
tREM
Recovery Time
CLEAR to Q
2.7
50
2.5
2.5
2.5
ns
3.3(*)
2.0
2.0
2.0
fMAX
Maximum Clock
Frequency
2.7
15
55
110
55
50
MHz
2.7
50
45
604035
3.3(*)
15
95
150
80
75
3.3(*)
50
60
90
55
50
tOSLH
tOSHL
Output to Output
Skew Time (note 1,2)
2.7
50
0.5
1.0
1.5
1.5
ns
3.3(*)
50
0.5
1.0
1.5
1.5


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