M45PE10

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Table 12. AC Characteristics (25MHz operation)

2. Value guaranteed by characterization, not 100% tested in production.

3. When using PP and PW instructions to update consecutive Bytes, optimized timings are obtained with one sequence including all

the Bytes versus several sequences of only a few Bytes. (1

≤n ≤256)

Test conditions specified in Table 8. and Table 9.

Symbol

Alt.

Parameter

Min.

Typ.

Max.

Unit

Clock Frequency for the following

instructions: FAST_READ, PW, PP, PE,

SE, DP, RDP, WREN, WRDI, RDSR

D.C.

25

MHz

Clock Frequency for READ instructions

D.C.

20

MHz

1

Clock High Time

18

ns

1

Clock Low Time

18

ns

0.03

V/ns

S Active Setup Time (relative to C)

10

ns

S Not Active Hold Time (relative to C)

10

ns

Data In Setup Time

5

ns

Data In Hold Time

5

ns

S Active Hold Time (relative to C)

10

ns

S Not Active Setup Time (relative to C)

10

ns

S Deselect Time

200

ns

2

Output Disable Time

15

ns

Clock Low to Output Valid

15

ns

Output Hold Time

0

ns

2

Reset Pulse Width

10

µs

Reset Recovery Time

3

µs

Chip should have been deselected

before Reset is de-asserted

10

ns

Write Protect Setup Time

50

ns

Write Protect Hold Time

100

ns

2

S to Deep Power-down

3

µs

2

S High to Standby Power mode

30

µs

(3)

Page Write Cycle Time (256 Bytes)

11

25

ms

Page Write Cycle Time (n Bytes)

10.2+

n*0.8/256

(3)

Page Program Cycle Time (256 Bytes)

1.2

5ms

Page Program Cycle Time (n Bytes)

0.4+

n*0.8/256

Page Erase Cycle Time

10

20

ms

Sector Erase Cycle Time

1

5

s