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LM51551DSSR Datasheet(PDF) 23 Page - Texas Instruments

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Part # LM51551DSSR
Description  2.2-MHz Wide Input Nonsynchronous Boost, SEPIC, Flyback Controller
Download  49 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM51551DSSR Datasheet(HTML) 23 Page - Texas Instruments

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G@ VCC
SW
Q
f
35mA
u
MAX2
SW
D
1 100ns f
u
SYNC
MAX1
RT
f
D
1 0.1
f
u
SUPPLY(MIN)
LOAD
F
MAX
SUPPLY(MAX)
DCR
SUPPLY(MAX)
DS(ON)
S
MAX
V
V
V
1 D
I
R
I
R
R
D
|
u
u
u
u
64 cycles of
current limit
32768 hiccup
mode off cycles
60 cycles of
current limit
7 normal
switching
cycles
4 cycles of
current limit
Time
32768 hiccup
mode off cycles
Inductor Current
23
LM5155
www.ti.com
SNVSB75 – DECEMBER 2018
Product Folder Links: LM5155
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
9.3.10 Hiccup Mode Overload Protection (LM51551 Version Only)
To further protect the converter during prolonged current limit conditions, the LM51551 device option provides a
hiccup mode overload protection. The internal hiccup mode fault timer of the LM51551 counts the PWM clock
cycles when the cycle-by-cycle current limiting occurs. When the hiccup mode fault timer detects 64 cycles of
current limiting, an internal hiccup mode off timer forces the device to stop switching and pulls down SS. Then,
the device will restart after 32,768 cycles of hiccup mode off-time. The 64 cycle hiccup mode fault timer is reset if
8 consecutive switching cycles occur without exceeding the current limit threshold. The soft-start time must be
long enough not to trigger the hiccup mode protection during soft-start time because the hiccup mode fault timer
is enabled during the soft-start.
Figure 36. Hiccup Mode Overload Protection
To avoid an unexpected hiccup mode operation during a harsh load transient condition, it is recommended to
have more margin when programming the peak-current limit.
9.3.11 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
When designing boost converters, the maximum duty cycle should be reviewed at the minimum supply voltage.
The minimum input supply voltage that can achieve the target output voltage is limited by the maximum duty
cycle limit, and it can be estimated as follows.
where
ISUPPLY(MAX) is the maximum input current.
RDCR is the DC resistance of the inductor.
RDS(ON) is the on-resistance of the MOSFET.
(15)
(16)
(17)
The minimum input supply voltage can be further decreased by supplying fSYNC which is less than fRT. DMAX is
DMAX1 or DMAX2, whichever is lower.
9.3.12 MOSFET Driver (GATE Pin)
The device provides an N-channel MOSFET driver that can source or sink a peak current of 1.5 A. The peak
sourcing current is larger when supplying an external VCC that is higher than 6.75 V VCC regulation target.
During start-up especially when the input voltage range is below the VCC regulation target , the VCC voltage
must be sufficient to completely enhance the MOSFET. If the MOSFET drive voltage is lower than the MOSFET
gate plateau voltage during start-up, the boost converter may not start up properly and it may stick at the
maximum duty cycle in a high power dissipation state. This condition can be avoided by selecting a lower
threshold N-channel MOSFET switch and setting the VSUPPLY(ON) greater than 6 to 7 V. Because the internal VCC
regulator has a limited sourcing capability, the MOSFET gate charge should satisfy the following inequality.
(18)


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