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IC-MCW Datasheet(PDF) 16 Page - IC-Haus GmbH |
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IC-MCW Datasheet(HTML) 16 Page - IC-Haus GmbH |
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16 / 22 page  prel imin ary prel imin ary iC-MCW BiSS WATCHDOG FOR RS422 WITH SPI Rev A1, Page 16/22 bits from the registers DeviceStatus and DeviceError. More information about the registers of the iC-MCW can be found in section "REGISTER LAYOUT" on page 19. Table 10 lists the bits of the StatusByte. Bit Name value 7 AVAIL 0 : No Frame Data Available 1 : New Frame Data Available 6 DETECT 0 : No BiSS Frame Detected 1 : New BiSS Frame(s) Detected 5-4 WAIT 00 : Wait for Begin of Frame 01 : Wait for Delay Acknowledge 10 : Wait for Start Bit 11 : Wait for BiSS Timeout 3 PLL 0 : PLL Lock OK 1 : PLL Lock Warning 2 SPI 0 : SPI Communication OK 1 : SPI Communication Error 1 FRAME 0 : Frame Data OK 1 : Frame Error Detected 0 RESET 0 : No Chip Reset 1 : Chip Reset Detected Table 10: ReadStatus Bits AVAIL and DETECT: These bits are used to inform the host about new frame data for communication systems that use status polling instead of interrupt requests. Especially the bit AVAIL should be used to control the request of frame data from the iC-MCW. WAIT: The bits WAIT show the wait state of the iC-MCW. Ac- cording to Table 10 the bits can be used to monitor what signal the iC-MCW is waiting for. This information can be used to debug the communication if the chip waits for the start bit an exceptional period of time for example. WAIT can be mapped to the internal logical states as shown in Table 11. More information about the inter- nal logical states can be found in section "MODE OF OPERATION" on page 11. PLL, SPI, FRAME and RESET: PLL, FRAME and RESET correspond to the error bits of the register DeviceError directly. The bit SPI combines the error bits BYTE, OPCODE, READ and WRITE from the register DeviceError. The bit is set if one of the error bits is set by the SPI engine. Detailed information about the register DeviceError can be found in section "REGISTER LAYOUT" on page 19. Logical State Wait for IDLE Begin of Frame ABTO BiSS Timeout DELAY Delay Acknowledge READY BiSS Timeout START Start Bit CDS BiSS Timeout DATA BiSS Timeout ERROR BiSS Timeout Table 11: Wait States of the iC-MCW ReadFrameData In general the command ReadFrameData provides a continuous stream of bytes of the last BiSS frame. The command should only be used if an interrupt request is detected by the host system or the bit AVAIL of the StatusByte is set. After receiving the opcode of the command in the first byte on pin MOSI, the iC-MCW returns the byte INFO that reports the status of the current BiSS frame in the second byte on pin MISO. There are several codes of INFO that indicate what data is provided in the following SPI bytes. Table 12 lists the possible output of INFO and what it means. INFO Code Description NO_FRAME 0xFF No BiSS Frame in Memory, BANK_BUSY 0xFE Memory Bank Busy, Data Invalid FRAME_ERROR 0xFD BiSS Frame Error, See Error Code NO_CDS 0xFC Reduced BiSS Frame Detected, NCDM Only LENGTH_ERROR 0xFB Incomplete BiSS Frame Data, 250 Bits Available Only FRAME_LENGTH 0xFA - Valid BiSS Frame, 0x01 Data Ready to Transmit NO_DATA 0x00 Valid BiSS Frame, CDS and NCDM Only Table 12: INFO Byte of ReadFrameData NO_FRAME: If INFO equals NO_FRAME, there is no new frame de- tected since the last ReadFrameData SPI Command. Hence, there is no frame data to be read out of the memory of the iC-MCW. |
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