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XRT71D04 Datasheet(PDF) 13 Page - Exar Corporation

Part No. XRT71D04
Description  4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
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Maker  EXAR [Exar Corporation]
Homepage  http://www.exar.com
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XRT71D04 Datasheet(HTML) 13 Page - Exar Corporation

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XRT71D04
4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. 1.1.1
12
SYSTEM DESCRIPTION
The XRT71D04 is an integrated 4-channel E3/DS3/
STS-1 jitter attenuator that attenuates the jitter from
the input clock and data. The jitter attenuation perfor-
mance meets the latest specifications such as Bellcore
GR-499 CORE,GR-253 CORE, ETSI TBR24,ITU-T
G.751,ITU-T G.752 and ITU-T G.755 standards.
The XRT71D04 also meets both the mapping and
pointer adjustment jitter generation criteria for both
Category I and Category II interfaces as specified in
Bellcore GR-253.
The XRT71D04 also meets the DS3 wander specifi-
cation that apply to SONET and asynchronous inter-
faces as specified in the ANSI T1.105.03b 1997 stan-
dard.
For support of loop-timing applications, the
XRT71D04 can also be used to reduce and limit the
amount of jitter in the recovered line clock signal.
Figure 5 presents a simple block diagram of the
XRT71D04, when it is configured to operate in the
Hardware Mode and Figure 6 presents a simple block
diagram of the XRT71D04, when it is configured to
operate in the Host Mode.
FIGURE 5. A TYPICAL CHANNEL_N OF THE XRT71D04 CONFIGURED TO OPERATE IN THE HARDWARE MODE
FSS
HOST
Reset
DS3/E3_n
16/32 Bit FIFO
Timing Control Block /
Phase locked Loop
Write Clock
Read Clock
RRCLK_n
RRPOS_n
RRNEG_n
FL_n
DJA_n
RClk_n
RCLKES
RPOS_n
RNEG_n
ICT
MCLK_n
Jittery
Clock
Smoothed
Clock
RRCLKES


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