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A25L16PMF-50 Datasheet(PDF) 10 Page - AMIC Technology |
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A25L16PMF-50 Datasheet(HTML) 10 Page - AMIC Technology |
10 / 34 page A25L80P PRELIMINARY (May 2005, Version 0.0) 9 AMIC Technology Corp. Write Enable (WREN) The Write Enable (WREN) instruction (Figure 4.) sets the Write Enable Latch (WEL) bit. The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction. The Write Enable (WREN) instruction is entered by driving Chip Select ( S ) Low, sending the instruction code, and then driving Chip Select ( S ) High. Figure 4. Write Enable (WREN) Instruction Sequence S C D Q High Impedance Instruction 0 1 23 45 6 7 Write Disable (WRDI) The Write Disable (WRDI) instruction (Figure 5.) resets the Write Enable Latch (WEL) bit. The Write Disable (WRDI) instruction is entered by driving Chip Select ( S ) Low, sending the instruction code, and then driving Chip The Write Enable Latch (WEL) bit is reset under the following conditions: ﹣ Power-up ﹣ Write Disable (WRDI) instruction completion ﹣ Write Status Register (WRSR) instruction completion ﹣ Page Program (PP) instruction completion ﹣ Sector Erase (SE) instruction completion ﹣ Bulk Erase (BE) instruction completion Figure 5. Write Disable (WRDI) Instruction Sequence S C D Q High Impedance Instruction 0 1 23 45 6 7 |
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