Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

LDS8868 Datasheet(PDF) 10 Page - IXYS Corporation

Part No. LDS8868
Description  6-Channel Ultra Low Dropout LED Driver
Download  14 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  IXYS [IXYS Corporation]
Homepage  http://www.ixys.com
Logo IXYS - IXYS Corporation

LDS8868 Datasheet(HTML) 10 Page - IXYS Corporation

Back Button LDS8868 Datasheet HTML 6Page - IXYS Corporation LDS8868 Datasheet HTML 7Page - IXYS Corporation LDS8868 Datasheet HTML 8Page - IXYS Corporation LDS8868 Datasheet HTML 9Page - IXYS Corporation LDS8868 Datasheet HTML 10Page - IXYS Corporation LDS8868 Datasheet HTML 11Page - IXYS Corporation LDS8868 Datasheet HTML 12Page - IXYS Corporation LDS8868 Datasheet HTML 13Page - IXYS Corporation LDS8868 Datasheet HTML 14Page - IXYS Corporation  
Zoom Inzoom in Zoom Outzoom out
 10 / 14 page
background image
LDS8868
© 2009 IXYS Corp.
10
Doc. No. 8868_DS, Rev. N2.1
Characteristics subject to change without notice
control input. By pulsing this signal according to a
specific protocol, a set of internal registers can be
addressed and written into allowing to configure each
bank of LEDs with the desired current. There are six
registers: the first five are 4 bits long and the sixth is
1 bit long. The registers are programmed by first
selecting the register address and then programming
data into that register.
An internal counter records the number of falling
edges to identify the address and data. The address
is serially programmed adhering to low and high
duration time delays. One down pulse corresponds to
register
1
being
selected.
Two
down
pulses
correspond to register 2 being selected and so on up
to register 6. . tLO and tHI must be within 200ns to
100
μs. . Any pulse with less than 200 ns width may
be ignored.
Once the final rising edge of the address pulse is
programmed, the user must wait at least 500
μs
before programming the first data pulse. Any falling
edge after this minimum delay will be recognised as a
first data pulse.
Data in a register is reset once it is selected by the
address pulses. If a register is selected but no data is
programmed, next pulse sequence will be recognized
as data only. Do not send register address only
without following data because it may disrupt normal
device operation.
Once the final rising edge of the data pulses is
programmed, the user must wait at least 1.5ms
before
programming
another
address.
If
programming fails or is interrupted, the user must
wait at least 2 ms (tRESETDELAY) from the last rising
edge before reprogramming can commence.
Upon EN/SET pin goes high the device automatically
starts looking for an address. If no falling edge is
detected within 100
μs, then the user must wait at
least 2 ms before trying to program the device again.
The device requires a minimum 10
μs delay to ensure
the initialization of the internal logic at power-up. After
this time delay, EN/SET pin may be set high and the
device registers may be programmed adhering to the
timing constraints shown in Figure 1.
Register REG1 allows to set the mode and select the
pairs of LEDs to be turned on. A low LED current
mode exists to allow for very low current operation
under 4mA per channel. If IMODE equals 1, the high
current range is selected up to 32mA. If IMODE is set
to 0, all currents are divided by 8. Each bank of LEDs
(A, B or C) can be turned on independently by setting
the respective bit ENA, ENB, ENC to 1.
Register REG2 allows to set the same current for all
6 channels. REG3, REG4, REG5 allow to set the
current respectively in banks C, B and A. The three
banks can be programmed with independent current
values.
REG6 triggers a charge pump. This forces the charge
pump to start from 1x mode and determine the
correct mode it should be in to drive the LEDs most
efficiently. If the input voltage has risen or the device
has been reprogrammed to other LED values, it is
recommended to trigger this reset allowing the
charge pump to run in the most efficient mode.
To power-down the device and turn-off all current
sources, the EN/SET input should be low for at least
1.5ms (tOFF) or longer. The driver typically powers-
down with a delay of about 1ms. All register data are
cleared.
Unused LED Channels
For applications with only four or two LEDs, unused
LED banks can be disabled via the enable register
internally and left to float or connect to Vout.
For applications requiring 1, 3, or 5 channels, the
unused LED pins should be tied to VOUT (see Figure
3). If LED pin voltage is within 1 V of VOUT, then the
channel is switched off and a 250
μA test current is
placed in the channel to sense when the channel
moves below VOUT – 1.5 V.
Protection Modes
The LDS8868 has follow protection modes:
Figure 3. Application circuit with 5 LEDs
1. LED short to VOUT protection
If LED pin is shorted to VOUT, LED burned out
becomes as short circuit, or LED pin voltage is within
from
VOUT to (VOUT -
1.5V)
range,
LDS8868
recognizes this condition as “LED Short” and disables
this channel. If LED pin voltage is less than (Vout –


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn