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MM74HC245AMTC Datasheet(PDF) 2 Page - ON Semiconductor |
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MM74HC245AMTC Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 10 page ![]() © 2005 Fairchild Semiconductor Corporation DS005165 www.fairchildsemi.com September 1983 Revised May 2005 MM74HC245A Octal 3-STATE Transceiver General Description The MM74HC245A 3-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology, and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capaci- tances. This circuit possesses the low power consumption and high noise immunity usually associated with CMOS cir- cuitry, yet has speeds comparable to low power Schottky TTL circuits. This device has an active LOW enable input G and a direc- tion control input, DIR. When DIR is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW, data flows from the B inputs to the A outputs. The MM74HC245A transfers true data from one bus to the other. This device can drive up to 15 LS-TTL Loads, and does not have Schmitt trigger inputs. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Features ■ Typical propagation delay: 13 ns ■ Wide power supply range: 2–6V ■ Low quiescent current: 80 PA maximum (74 HC) ■ 3-STATE outputs for connection to bus oriented systems ■ High output drive: 6 mA (minimum) ■ Same as the 645 Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Top View Truth Table H HIGH Level L LOW Level X Irrelevant Order Number Package Number Package Description MM74HC245AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC245ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC245AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC245AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Control Inputs Operation G DIR L L B data to A bus L H A data to B bus HX Isolation |
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