SC16C652BIBS datasheet(9/44 Pages) PHILIPS

Part #	SC16C652BIBS

Description	5V, 3.3 V and 2.5V dual UART, 5 Mbit/s (max.),with 32-byte FIFOs and infrared(IrDA) encoder/decoder

Download	44 Pages

Scroll/Zoom	100%

Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

9 / 44 page

Philips Semiconductors

SC16C652B

Dual UART with 32-byte FIFOs and IrDA encoder/decoder

Product data

Rev. 03 — 10 December 2004

9 of 44

9397 750 14452

6.2 Internal registers

The SC16C652B provides two sets of internal registers (A and B) consisting of

17 registers each for monitoring and controlling the functions of each channel of the

UART. These registers are shown in Table 4. The UART registers function as data

holding registers (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO

control register (FCR), line status and control registers (LCR/LSR), modem status

and control registers (MCR/MSR), programmable data rate (clock) control registers

(DLL/DLM), and a user accessible scratchpad register (SPR).

[1]

These registers are accessible only when LCR[7] is a logic 0.

[2]

These registers are accessible only when LCR[7] is a logic 1.

[3]

Enhanced Feature Register, Xon1, 2 and Xoff1, 2 are accessible only when the LCR is set to

‘BF(HEX)’.

6.3 FIFO operation

The 32-byte transmit and receive data FIFOs are enabled by the FIFO Control

Register bit-0 (FCR[0]). With 16C2550 devices, the user can set the receive trigger

level, but not the transmit trigger level. The SC16C652B provides independent trigger

levels for both receiver and transmitter. To remain compatible with SC16C2550, the

transmit interrupt trigger level is set to 16 following a reset. It should be noted that the

user can set the transmit trigger levels by writing to the FCR register, but activation

will not take place until EFR[4] is set to a logic 1. The receiver FIFO section includes

a time-out function to ensure data is delivered to the external CPU. An interrupt is

generated whenever the Receive Holding Register (RHR) has not been read

following the loading of a character or the receive trigger level has not been reached.

Table 4:

Internal registers decoding

A2

A1

A0

READ mode

WRITE mode

General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, SPR)[1]

0

Receive Holding Register

Transmit Holding Register

0

1

Interrupt Enable Register

0

1

0

Interrupt Status Register

FIFO Control Register

0

1

Line Control Register

1

0

Modem Control Register

1

0

1

Line Status Register

n/a

1

0

Modem Status Register

n/a

1

Scratchpad Register

Baud rate register set (DLL/DLM)[2]

0

LSB of Divisor Latch

0

1

MSB of Divisor Latch

Enhanced register set (EFR, Xon/off 1-2)[3]

0

1

0

Enhanced Feature Register

1

0

Xon1 word

1

0

1

Xon2 word

1

0

Xoff1 word

1

Xoff2 word

Similar Part No. - SC16C652BIBS

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	SC16C652BIBS	219Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder Rev.04-1 September 2005
NXP Semiconductors	SC16C652BIBS	518Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder Rev. 5.0 - 2 November 2023

More results

Similar Description - SC16C652BIBS

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	SC16C652B	219Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder Rev.04-1 September 2005
	SC16C650B	881Kb / 51P	5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared (IrDA) encoder/decoder Rev. 03-10 December 2004
	SC16C650B	251Kb / 48P	5 V, 3.3 V and 2.5 V UART with 32-byte FIFOs and infrared (IrDA) encoder/decoder Rev. 04-14 September 2009
	SC16C654B	302Kb / 58P	5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.), with 64-byte FIFOs and infrared (IrDA) encoder/decoder Rev. 02-20 June 2005
	SC68C652B	205Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs, IrDA encoder/decoder, and 68 mode mP interface Rev. 02-2 November 2009
	SC16C2550B	211Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 04-15 February 2007
	SC16C2552B	188Kb / 38P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 03-12 February 2009
	SC16C752B	225Kb / 47P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs Rev. 03-14 December 2004
	SC16C2550B	221Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 05-12 January 2009
	SC16C2550B	200Kb / 42P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 02-14 December 2004

More results

SC16C652BIBS Datasheet(PDF) 9 Page - NXP Semiconductors

SC16C652BIBS Datasheet(HTML) 9 Page - NXP Semiconductors

Similar Part No. - SC16C652BIBS

Similar Description - SC16C652BIBS

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Download

Link URL