www.ti.com

SPECIFICATIONS

ADS8370

SLAS450 – JUNE 2005

At –40°C to 85°C, +VA = +5 V, +VBD = +5 V or +VBD = +2.7 V, using internal or external reference, f

unless otherwise noted. (All performance parameters are valid only after device has properly resumed from power down, see

Table 2.)

ADS8370IB

ADS8370I

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

ANALOG INPUT

Full-scale

+IN – (–IN)

0

0

V

+IN

–0.2

–0.2

Absolute input voltage

V

–IN

–0.2

0.2

–0.2

0.2

Sampling capacitance

(measured from ±IN to

40

40

pF

AGND)

Input leakage current

1

1

nA

SYSTEM PERFORMANCE

Resolution

16

16

Bits

No missing codes

16

16

Bits

Quiet zones observed

–1.25

±0.5

1.25

–2

2

LSB

INL

(16 bit)

Quiet zones not observed

±0.8

Quiet zones observed

–0.75

±0.4

0.75

–1

1.5

LSB

DNL

(16 bit)

Quiet zones not observed

±0.75

–0.75

±0.4

0.75

–1.5

1.5

mV

±0.4

±0.4

ppm/°C

–0.075

0.075

–0.15

0.15

%FS

±1.25

±1.25

ppm/°C

At DC

80

80

CMRR

Common-mode rejection ratio

dB

55

55

signal at 1 MHz

Noise

At 0 V analog input

40

40

µV RMS

DC Power supply rejection

PSRR

At full scale analog input

55

55

dB

ratio

SAMPLING DYNAMICS

Conversion time

1.0

1.16

1.0

1.16

µs

Acquisition time

0.50

0.50

µs

Throughput rate

600

600

kHz

Aperture delay

10

10

ns

Aperture jitter

12

12

ps RMS

Step response

(6)

400

400

ns

Overvoltage recovery

400

400

ns

(1)

Ideal input span; does not include gain or offset error.

(2)

LSB means least significant bit.

(3)

Measured using analog input circuit in Figure 51 and digital stimulus in Figure 56 and Figure 57 and reference voltage of 4.096 V.

(4)

This is endpoint INL, not best fit.

(5)

Measured using external reference source so does not include internal reference voltage error or drift.

(6)

Defined as sampling time necessary to settle an initial error of Vref on the sampling capacitor to a final error of 1 LSB at 16-bit level.

Measured using the input circuit in Figure 51.

3