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ADN2850BRUZ25 Datasheet(PDF) 26 Page - Analog Devices

Part No. ADN2850BRUZ25
Description  Nonvolatile Memory, Dual 1024-Position Digital Resistor
Download  30 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADN2850BRUZ25 Datasheet(HTML) 26 Page - Analog Devices

 
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ADN2850
Data Sheet
Rev. F | Page 26 of 30
RESISTANCE TOLERANCE, DRIFT, AND
TEMPERATURE COEFFICIENT MISMATCH
CONSIDERATIONS
In operation, such as gain control, the tolerance mismatch between
the digital resistor and the discrete resistor can cause repeatability
issues among various systems (see Figure 42). Because of the
inherent matching of the silicon process, it is practical to apply
the dual-channel device in this type of application. As such, R1
can be replaced by one of the channels of the digital resistor and
programmed to a specific value. R2 can be used for the adjustable
gain. Although it adds cost, this approach minimizes the tolerance
and temperature coefficient mismatch between R1 and R2. This
approach also tracks the resistance drift over time. As a result,
these less than ideal parameters become less sensitive to system
variations.
AD8601
+
Vi
U1
VO
C1
B
W
R2
R1*
* REPLACED WITH ANOTHER
CHANNEL OF RDAC
Figure 42. Linear Gain Control with Tracking Resistance Tolerance,
Drift, and Temperature Coefficient
RDAC CIRCUIT SIMULATION MODEL
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. A parasitic
simulation model is shown in Figure 43.
RDAC
25kΩ
W
80pF
CB
11pF
B
Figure 43. RDAC Circuit Simulation Model (RDAC = 25 kΩ)
The following code provides a macro model net list for the
25 kΩ RDAC:
.PARAM D = 1024, RDAC = 25E3
*
.SUBCKT DPOT ( W, B)
*
CW
W
0
80E-12
RWB W
B
{D/1024 * RDAC + 50}
CB
B
0
11E-12
*
.ENDS DPOT


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