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LP5900 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part No. LP5900
Description  Ultra Low Noise, 100 mA Linear Regulator for RF/Analog Circuits Requires No Bypass Capacitor
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP5900 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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Electrical Characteristics (Continued)
Limits in standard typeface are for T
A =25
oC. Limits in boldface type apply over the full operating junction temperature range
(-40oC
≤ T
J
≤ +125oC). Unless otherwise noted, specifications apply to the LP5900 Typical Application Circuit (pg. 1) with: V
IN
=V
OUT (NOM) + 1.0V, VEN = 1.2V, CIN =COUT = 0.47 µF, IOUT = 1.0 mA. (Note 2), (Note 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Login Input Thresholds
V
IL
Low Input Threshold (V
EN)VIN = 2.5V to 5.5V
0.4
V
V
IH
High Input Threshold (V
EN)VIN = 2.5V to 5.5V
1.2
V
I
EN
Input Current at V
EN Pin
(Note 14)
V
EN = 5.5V and VIN = 5.5V
5.5
µA
V
EN = 0.0V and VIN = 5.5V
0.001
Transient Characteristics
∆V
OUT
Line Transient
(Note 15)
V
IN =(VOUT(NOM) + 1.0V) to
(V
OUT(NOM) + 1.6V) in 30 µs, IOUT =1
mA
−2
mV
V
IN =(VOUT(NOM) + 1.6V) to
(V
OUT(NOM) + 1.0V) in 30 µs, IOUT =1
mA
2
Load Transient
(Note 15)
I
OUT = 1 mA to 100 mA in 10 µs
−70
mV
I
OUT =100 mA to1mAin10µs
30
Overshoot on Startup
(Note 15)
20
mV
Turn on Time
To 95% of V
OUT(NOM)
150
300
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage.
Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX =TJ-MAX-OP –(θJA xPD-MAX). See applications section.
Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: CIN,COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 9: The device maintains a stable, regulated output voltage without a load current.
Note 10: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. This
parameter only applies to output voltages above 2.5V.
Note 11: Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
Note 12: Short Circuit Current is measured with VOUT pulled to 0v and VIN worst case = 6.0V.
Note 13: Ground current is defined here as the total current flowing to ground as a result of all input voltages applied to the device.
Note 14: There isa1M
Ω resistor between VEN and ground on the device.
Note 15: This specification is guaranteed by design.
Note 16: Detailed description of the board can be found in JESD51-7
Output & Input Capacitor, Recommended Specifications
Symbol
Parameter
Conditions
Min
Nom
Max
Units
C
IN
Input Capacitance
Capacitance for stability
0.33
0.47
µF
C
OUT
Output Capacitance
0.33
0.47
10
ESR
Output/Input Capacitance
5
500
m
Note: The minimum capacitance should be greater than 0.33 µF over the full range of operating conditions. The capacitor tolerance should be 30% or better over
the full temperature range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this
minimum capacitance specification is met. X7R capacitors are recommended however capacitor types X5R, Y5V and Z5U may be used with consideration of the
application and conditions.
www.national.com
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