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S1D13706 Datasheet(PDF) 33 Page - Epson Company

Part # S1D13706
Description  S1D13706 Embedded Memory LCD Controller
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Manufacturer  EPSON [Epson Company]
Direct Link  http://www.epsondevice.com
Logo EPSON - Epson Company

S1D13706 Datasheet(HTML) 33 Page - Epson Company

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Epson Research and Development
Page 33
Vancouver Design Center
Hardware Functional Specification
S1D13706
Issue Date: 2004/02/09
X31B-A-001-09
Note
Maximum internal requirements for clocks derived from CLKI must be considered
when determining the frequency of CLKI. See Section 6.1.2, “Internal Clocks” on page
34 for internal clock requirements.
Note
Maximum internal requirements for clocks derived from CLKI2 must be considered
when determining the frequency of CLKI2. See Section 6.1.2, “Internal Clocks” on page
34 for internal clock requirements.
Table 6-2: Clock Input Requirements for CLKI when CLKI to BCLK divide = 1
Symbol
Parameter
2.0V
3.3V
Units
MinMax
MinMax
f
OSC
Input Clock Frequency (CLKI)
20
66
MHz
T
OSC
Input Clock period (CLKI)
1/f
OSC
1/f
OSC
ns
t
PWH
Input Clock Pulse Width High (CLKI)
3
3
ns
t
PWL
Input Clock Pulse Width Low (CLKI)
3
3
ns
t
f
Input Clock Fall Time (10% - 90%)
5
5
ns
t
r
Input Clock Rise Time (10% - 90%)
5
5
ns
Table 6-3: Clock Input Requirements for CLKI2
Symbol
Parameter
2.0V
3.3V
Units
MinMax
MinMax
f
OSC
Input Clock Frequency (CLKI2)
20
66
MHz
T
OSC
Input Clock period (CLKI2)
1/f
OSC
1/f
OSC
ns
t
PWH
Input Clock Pulse Width High (CLKI2)
3
3
ns
t
PWL
Input Clock Pulse Width Low (CLKI2)
3
3
ns
t
f
Input Clock Fall Time (10% - 90%)
5
5
ns
t
r
Input Clock Rise Time (10% - 90%)
5
5
ns


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