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S1D13706 Datasheet(PDF) 95 Page - Epson Company

Part # S1D13706
Description  S1D13706 Embedded Memory LCD Controller
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Manufacturer  EPSON [Epson Company]
Direct Link  http://www.epsondevice.com
Logo EPSON - Epson Company

S1D13706 Datasheet(HTML) 95 Page - Epson Company

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Epson Research and Development
Page 95
Vancouver Design Center
Hardware Functional Specification
S1D13706
Issue Date: 2004/02/09
X31B-A-001-09
8 Registers
This section discusses how and where to access the S1D13706 registers. It also provides
detailed information about the layout and usage of each register.
8.1 Register Mapping
The S1D13706 registers are memory-mapped. When the system decodes the input pins as
CS# = 0 and M/R# = 0, the registers may be accessed. The register space is decoded by
A[16:0].
8.2 Register Set
The S1D13706 register set is as follows.
Table 8-1: S1D13706 Register Set
Register
Pg
Register
Pg
Read-Only Configuration Registers
REG[00h] Revision Code Register
96
REG[01h] Display Buffer Size Register
97
REG[02h] Configuration Readback Register
97
Clock Configuration Registers
REG[04h] Memory Clock Configuration Register
97
REG[05h] Pixel Clock Configuration Register
98
Look-Up Table Registers
REG[08h] Look-Up Table Blue Write Data Register
99
REG[09h] Look-Up Table Green Write Data Register
99
REG[0Ah] Look-Up Table Red Write Data Register
99
REG[0Bh] Look-Up Table Write Address Register
100
REG[0Ch] Look-Up Table Blue Read Data Register
100
REG[0Dh] Look-Up Table Green Read Data Register
100
REG[0Eh] Look-Up Table Red Read Data Register
101
REG[0Fh] Look-Up Table Read Address Register
101
Panel Configuration Registers
REG[10h] Panel Type Register
101
REG[11h] MOD Rate Register
103
REG[12h] Horizontal Total Register
103
REG[14h] Horizontal Display Period Register
103
REG[16h] Horizontal Display Period Start Position Register 0
104
REG[17h] Horizontal Display Period Start Position Register 1
104
REG[18h] Vertical Total Register 0
105
REG[19h] Vertical Total Register 1
105
REG[1Ch] Vertical Display Period Register 0
105
REG[1Dh] Vertical Display Period Register 1
105
REG[1Eh] Vertical Display Period Start Position Register 0
106
REG[1Fh] Vertical Display Period Start Position Register 1
106
REG[20h] FPLINE Pulse Width Register
106
REG[22h] FPLINE Pulse Start Position Register 0
107
REG[23h] FPLINE Pulse Start Position Register 1
107
REG[24h] FPFRAME Pulse Width Register
107
REG[26h] FPFRAME Pulse Start Position Register 0
108
REG[27h] FPFRAME Pulse Start Position Register 1
108
REG[28h] D-TFD GCP Index Register
108
REG[2Ch] D-TFD GCP Data Register
108
Display Mode Registers
REG[70h] Display Mode Register
109
REG[71h] Special Effects Register
111
REG[74h] Main Window Display Start Address Register 0
113
REG[75h] Main Window Display Start Address Register 1
113
REG[76h] Main Window Display Start Address Register 2
113
REG[78h] Main Window Line Address Offset Register 0
114
REG[79h] Main Window Line Address Offset Register 1
114


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