V

IN

Integrator 1

Integrator 2

0 V

DAC

V

1

V

2

V

4

V

5

V

3

CMP

f

CLKIN

10

AMC1035

SBAS837 – AUGUST 2018

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Feature Description (continued)

7.3.2 Modulator

The modulator implemented in the AMC1035 (such as the one conceptualized in Figure 4) is a second-order,

integrator stage. The output of the first integrator feeds the input of the second integrator stage, resulting in

progress in the opposite direction and forcing the value of the integrator output to track the average value of the

input.

Figure 4. Block Diagram of a Second-Order Modulator

As depicted in Figure 3, the modulator shifts the quantization noise to high frequencies. Therefore, use a low-

pass digital filter at the output of the device to increase the overall performance. This filter is also used to convert

from the 1-bit data stream at a high sampling rate into a higher-bit data word at a lower rate (decimation). TI's

microcontroller families TMS320F28004x, TMS320F2807x, and TMS320F2837x offer a suitable programmable,

hardwired filter structure termed a sigma-delta filter module (SDFM) optimized for usage with the AMC1035.

Also, SD24_B converters on the MSP430F677x microcontrollers offer a path to directly access the integrated

sinc-filters for a simple system-level solution for multichannel, isolated current sensing. An additional option is to

use a suitable application-specific device, such as the AMC1210 (a four-channel digital sinc filter). Alternatively, a

field-programmable gate array (FPGA) can be used to implement the filter.

7.3.3 Clock Input

The AMC1035 system clock is provided externally at the CLKIN pin. The clock signal can be applied and paused

at any time. When the clock signal is paused, the modulator stops the analog signal conversion and the digital

output signal remains frozen in the last logic state. When the clock signal is applied again after a pause, the

specification in the Switching Characteristics table.