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M5M28F101AFP Datasheet(PDF) 2 Page - Mitsubishi Electric Semiconductor |
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M5M28F101AFP Datasheet(HTML) 2 Page - Mitsubishi Electric Semiconductor |
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2 / 10 page  MITSUBISHI LSIs 1048576-BIT (131072-WORD BY 8-BIT) CMOS FLASH MEMORY M5M28F101AFP,J,VP,RV-85,-10 (970407) 2 1. 2. 3. FUNCTION BLOCK DIAGRAM DATA PROTECTION Power Supply Voltage When the power supply voltage (Vcc) is less than 2.5V, the device ignores WE signal. Write Inhibit In the cases, as below, write mode is not set. 1) When OE is terminated to the low level. 2) From each mode beginning through finish after 2nd rising edge of WE for program, auto-program, erase, and auto- erase. Over-erase Protection Just after powering up, if erase command is inputted, erase operation is not executed. Once byte-program is performed or verified data is not FFH in the erase-verify mode, successive command input for erase will be accepted. Because of this, it is applicable to the case of multi-chip erasing simultaneously. PROGRAM VOLTAGE SW. X-DECODER Y-DECODER CHIP ENABLE OUTPUT ENABLE CIRCUITS ERASE VOLTAGE SW. 131072 WORD x8 BIT CELL MATRIX Y-GATE OUTPUT SENSE AND OUTPUT BUFFERS A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A16 A15 A14 A13 A12 A11 A10 VERIFY VOLTAGE SW. TIMER CONTROL CIRCUITS COMMAND LATCH D0 D1 D2 D3 D4 D5 D6 D7 CE OE WE VPP (5V, 12V) VCC (5V) GND (0V) ADDRESS INPUTS CHIP ENABLE INPUT OUTPUT ENABLE INPUT WRITE ENABLE INPUT DATA INPUTS/OUTPUTS M5M28F101A are set to the Read-only mode or Read-write mode by applying the voltage of VPPL or VPPH, respectively, to VPP pin. In Read-only mode, three operation modes, Read, Out-put disable and Stand-by are accessible. While, in Read-Write mode, four operation modes, Read, Output disable, Stand-by and Write are functional. Read Set CE and OE terminals to the read mode (low level). Low level input to CE and OE, and address signals to the address inputs (A0~A16) make the data contents of the designated address location available at data input/output(D0~D7). Output Disable When OE is at high level, output from the devices is disabled. Data input/output are in a high-impedance (High-Z) state. Stand-by When CE is at high level, the devices is in the stand-by mode and its power consumption is substantially reduced. Data input/output are in a high-impedance (High-Z) state. Write Software command accomplishes program and erase operations via the command latch in the device, when high voltage is supplied to VPP. The contents of the latch serve as input to the internal controller. The controller output dictates the function of device. The command latch is written by bringing WE to low level, while CE is at low level and OE is at high level. Addresses are latched on the falling edge of WE, while data is latched on the rising edge of WE. Standard micro-processor write timings are used. |
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