FEMTOCLOCKS™ CRYSTAL-TO-HCSL

CLOCK GENERATOR

841602 DATA SHEET

8

REVISION A 4/15/15

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. To achieve optimum jitter

performance, power supply isolation is required. The 841602

provides separate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

DD

and V

DDA

should

be individually connected to the power supply plane through

vias, and 0.01µF bypass capacitors should be used for each

pin. Figure 1 illustrates this for a generic V

DD

pin and also shows

that V

DDA

requires that an additional10

Ω resistor along with a 10µF

bypass capacitor be connected to the V

DDA

pin.

10

Ω

V

DDA

10

μF

.01

μF

3.3V

.01

μF

V

DD

For applications not requiring the use of the crystal oscillator input,

both XTAL_IN and XTAL_OUT can be left floating. Though not

required, but for additional protection, a 1k

Ω resistor can be tied

from XTAL_IN to ground.

For applications not requiring the use of the reference clock,

it can be left floating. Though not required, but for additional

protection, a 1k

Ω resistor can be tied from the REF_IN to ground.

All control pins have internal pull-downs; additional resistance is not

required but can be added for additional protection. A 1k

Ω resistor

can be used.

All unused differential outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.