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## AD5934 Datasheet(PDF) 16 Page - Analog Devices

 Part No. AD5934 Description Impedance Converter, Network Analyzer Download 31 Pages Scroll/Zoom 100% Maker AD [Analog Devices] Homepage http://www.analog.com Logo ## AD5934 Datasheet(HTML) 16 Page - Analog Devices           16 / 31 page AD5934Data SheetRev. E | Page 16 of 312-POINT CALIBRATIONAlternatively, it is possible to minimize this error by assumingthat the frequency variation is linear and adjusting the gainfactor with a 2-point calibration. Figure 19 shows an impedanceprofile based on a 2-point gain factor calculation.101.598.55466FREQUENCY (kHz)101.0100.5100.099.599.05658606264VDD = 3.3VCALIBRATION FREQUENCY = 60kHzTA = 25°CMEASURED CALIBRATION IMPEDANCE = 100kΩFigure 19. Impedance Profile Using a 2-Point Gain Factor Calculation2-POINT GAIN FACTOR CALCULATIONThis is an example of a 2-point gain factor calculation assumingthe following:Output excitation voltage = 2 V p-pCalibration impedance value, ZUNKNOWN= 100.0 kΩPGA gain = ×1Supply voltage = 3.3 VCurrent-to-voltage amplifier gain resistor = 100 kΩCalibration frequencies = 55 kHz and 65 kHzTypical values of the gain factor calculated at the two calibrationfrequencies readGain factor calculated at 55 kHz is 1.031224 × 10−9.Gain factor calculated at 65 kHz is 1.035682 × 10−9.Difference in gain factor (ΔGF) is1.035682 × 10−9 − 1.031224 × 10−9 = 4.458000 × 10−12.Frequency span of sweep (ΔF) is 10 kHz.Therefore, the gain factor required at 60 kHz is given by9-101.031224kHz5kHz1012-4.458000E×+×The required gain factor is 1.033453 × 10−9.The impedance is calculated as previously described in theImpedance Calculation section.GAIN FACTOR SETUP CONFIGURATIONWhen calculating the gain factor, it is important that the receivestage is operating in its linear region. This requires careful selectionof the excitation signal range, current-to-voltage gain resistorand PGA gain. The gain through the system shown in Figure 20is given byOutput Excitation Voltage Range ×UNKNOWNZResistorSettingGain× PGA GainVINVDD/2RFBADCLPFZUNKNOWNVOUTCURRENT-TO-VOLTAGEGAIN SETTING RESISTORPGA(×1 OR ×5)Figure 20. System Voltage GainFor this example, assume the following system settings:VDD = 3.3 VGain setting resistor = 200 kΩZUNKNOWN = 200 kΩPGA setting = ×1The peak-to-peak voltage presented to the ADC input is 2 V p-p.However, had the user chosen a PGA gain of ×5, the voltagewould saturate the ADC.GAIN FACTOR RECALCULATIONThe gain factor must be recalculated for a change in any of thefollowing parameters:•Current-to-voltage gain setting resistor•Output excitation voltage•PGA gain

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