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AD5934 Datasheet(PDF) 5 Page - Analog Devices |
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AD5934 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 31 page 
Data Sheet AD5934 Rev. E | Page 5 of 31 Y Version1 Parameter Min Typ Max Unit Test Conditions/Comments RECEIVE STAGE Input Leakage Current 1 nA To VIN pin Input Capacitance5 0.01 pF Pin capacitance between VOUT and GND Feedback Capacitance, CFB 3 pF Feedback capacitance around current-to- voltage amplifier; appears in parallel with feedback resistor ANALOG-TO-DIGITAL CONVERTER5 Resolution 12 Bits Sampling Rate 250 kSPS ADC throughput rate LOGIC INPUTS Input High Voltage, VIH 0.7 × VDD Input Low Voltage, VIL 0.3 × VDD Input Current6 1 µA TA = 25° Input Capacitance 7 pF TA = 25°C POWER REQUIREMENTS VDD 2.7 5.5 V IDD, Normal Mode 10 15 mA VDD = 3.3 V 17 25 mA VDD = 5.5 V IDD, Standby Mode 7 mA VDD = 3.3 V; see the Control Register section 9 mA VDD = 5.5 V IDD, Power-Down Mode 0.7 5 µA VDD = 3.3 V 1 8 µA VDD = 5.5 V 1 Temperature range for Y version = −40°C to +125°C, typical at +25°C. 2 The lower limit of the output excitation frequency can be lowered by scaling the clock supplied to the AD5934. 3 The peak-to-peak value of the ac output excitation voltage scales with supply voltage according to the following formula. VDD is the supply voltage. Output Excitation Voltage (V p-p) = [2/3.3] × VDD 4 The dc bias value of the output excitation voltage scales with supply voltage according to the following formula. VDD is the supply voltage. Output Excitation Voltage (V p-p) = [2/3.3] × VDD 5 Guaranteed by design or characterization, not production tested. Input capacitance at the VOUT pin is equal to pin capacitance divided by open-loop gain of current- to-voltage amplifier. 6 The accumulation of the currents into Pin 8, Pin 15, and Pin 16. |
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