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NCD2400M Datasheet(PDF) 14 Page - IXYS Corporation

Part No. NCD2400M
Description  Wide Capacitance Range, Non-volatile Digital Programmable Capacitor
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Maker  IXYS [IXYS Corporation]
Homepage  http://www.ixys.com
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NCD2400M Datasheet(HTML) 14 Page - IXYS Corporation

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INTEGRATED CIRCUITS DIVISION
NCD2400M
14
www.ixysic.com
R01
3.6.1 Write Commands
With a valid device address and the R/W bit set to 0,
the NCD2400M will execute a write operation. The
8-bit address byte follows the Start bit and consists of
two parts, first the device 7-bit Chip ID then the R/W
bit located in the byte’s least significant bit (LSB)
position. For a given device Chip ID, the address byte
is the same for all write commands.
Following the device address byte, for all write
commands, the Master will send two CONFIG data
bytes containing information to control the device and
when the output capacitor value is to be modified,
CDAC codes. As with the address byte, both
CONFIG 1 and CONFIG 0 are 8-bit bytes.
The three realizable operations by means of the write
command are:
Write Volatile Register
Write Non-Volatile Memory
Set Non-Volatile Mode
3.6.2 Write Volatile Register Operation
The Write Volatile Register Operation takes data from
the Configuration Bytes and stores it in the Volatile
Register. Additionally, anytime the Write Volatile
Register Operation is executed, the NCD2400M will
be placed into the Volatile Mode. In order to return to
the Non-Volatile Mode the device will need to be
power cycled or sent a “Set Non-Volatile Mode”
command
A Write Volatile Register command issued by the bus
Master consists of the device address byte followed by
two CONFIG byte sequences: CONFIG 1 then
CONFIG 0.
CONFIG 1 consists of the NV/V control bit, six Don’t
Care bits, and the MSB of the CDAC code to be
written into the Volatile Register. Setting NV/V =1
specifies a Non-Volatile Memory write operation and
when NV/V = 0, a Volatile Register write operation will
be executed.
The most significant bit (MSB) of CONFIG 1,
CONFIG 1 <7> is the NV/V control bit. For a Volatile
Register write the next six bits, CONFIG 1 <6:1>, are
Don’t Care bits while the last bit, CONFIG 1 <0> is the
MSB of the CDAC code being written.
Located between the NV/V and CDAC MSB bits are
the six Don’t Care bits. Their value has no effect on the
outcome of the Volatile Register write operation. Since
a logic 0 on an I2C bus is the dominant state, it is
recommended these six bits be set to 0 in applications
where the bus is shared with other devices or where
the unit is located in a noisy environment.
The nine bit CDAC data to be written into the volatile
register is contained within the two Configuration
Bytes as such:
CDAC<8> bit is the last bit (LSB) of CONFIG 1
CDAC<7:0> bits are the CONFIG 0 <7:0> bits.
The CDAC bits map directly to the Volatile Register
such that CDAC<8> = VR<8>, CDAC<7> = VR<7>,
and so on.
The data transfer format for writing to the Volatile
Register (NV/V = 0) is shown below for a device with
Chip ID 0x60.
WRITE OPERATION: VOLATILE REGISTER
NOTE: In the diagram above, bit “a” in the address byte is the LSB of the Chip ID. Set this bit to 1 when addressing the NCD2400M1 device as
its Chip ID address is 0x61.
Master to Slave
Chip ID + W
CONFIG 0
Slave to Master
CONFIG 1
11
0
0
00
0
0
x
0
xxxxx
VR <8>
VR <7:0>
a
7-Bit Address
NV / V
R / W
S Chip ID + W
A
CONFIG 1
A CONFIG 0
A P


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