NCD2400M

R01

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9

The figure below shows how the capacitance varies with the supply voltage while CN is biased at one-half of the

supply voltage level. Here, the value obtained for 3.3V is used as a reference and the deviation is given in percentage.

Figure 6: Variation of the Capacitance at 10MHz with Supply Voltage, Relative to the Value at 3.3V

DC voltage biasing of the CN terminal has a small though visible influence on the performance of the Digital

Programmable Capacitor. The table below presents the variation of the series capacitance and ESR at 10MHz when

ESR values.

Capacitance (pF)

ESR (

)

0

1.65

3.3

0

1.65

3.3

0

1.7

1.7

1.9

0.509

0.442

0.695

1

2.1

2.1

2.3

0.739

0.720

1.006

2

2.5

2.5

2.7

0.949

0.973

1.29

4

3.2

3.2

3.5

1.271

1.366

1.742

8

4.7

4.7

5.1

1.754

1.952

2.431

16

7.6

7.7

8.2

2.256

2.564

3.188

32

13.7

13.7

14.3

4.342

4.968

6.31

64

25.6

25.6

26.4

3.259

3.755

4.882

128

49.6

49.6

50.3

2.063

2.372

3.14

256

97.4

97.5

98.1

1.204

1.377

1.827

511

193.2

194

193.2

0.75

0.846

1.106

Supply Voltage (V)

2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

Capacitance Variation

vs. Supply Voltage Relative to 3.3V

(f=10MHz)

C

0

C

1

C

2

C

4

C

8

C

16

C

32

C

64

C

128

C

256

C

511