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AK4601 Datasheet(PDF) 53 Page - Asahi Kasei Microsystems |
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AK4601 Datasheet(HTML) 53 Page - Asahi Kasei Microsystems |
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53 / 111 page  [AK4601] 016000391-E-01 - 53 - 2016/12 5-3. Input/ Output Interface Format The AK4601 has three digital input ports (SDIN1~SDIN3) and three digital output ports (SDOUT1~ SDOUT3). The input data format is determined by a combination of DISLx[1:0], DIEDGENx, DILSBEx and DIDLx[1:0] bits settings (x=1~3). The output data format is determined by a of DOSLx[1:0], DOEDGENx, DOLSBEx and DODLx[1:0] bits settings (x=1~3). DISLx[1:0] bits / DOSLx[1:0] bits (x=1~ 3) control input/output data slot length. DISLx[1] bit DOSLx[1] bit DISLx[0] bit DOSLx[0] bit Slot Length 0 0 24bit (default) 0 1 20bit 1 0 16bit 1 1 32bit Table 24. Slot Length Setting of Input/Output Data DIDLx[1:0] bits / DODLx[1:0] bits (x=1~ 3) control input/output audio data word length. DIDLx[1] bit DODLx[1] bit DIDLx[0] bit DODLx[0] bit Word Length 0 0 24bit (default) 0 1 20bit 1 0 16bit 1 1 32bit Table 25. Word Length Setting of Input/Output Audio Data DILSBEx bit/ DOLSBEx bit (x=1~ 3) selects the audio data format of a slot. DILSBEx bit DOLSBEx bit Slot Data Format 0 MSB First (default) 1 LSB First Table 26. Slot Data Format Setting DIEDGENx bit / DOEDGENx bit (x=1~ 3) select data transmission start timing of the data after second channel DIEDGENx bit DOEDGENx bit Start Timing 0 LRCK Edge Basis (default) 1 Slot Length Basis Table 27. Data Transmission Start Timing of The Data After Second Channel If the data transmitting timing is set to Slot length basis, the next channel ’s data is transmitted immediately without waiting a LRCK edge after transmitted one slot data (Figure 29 ~ Figure 32). If the data transmitting timing is set to LRCK edge basis, the next channel ’s data will not be transmitted until a LRCK edge even finished transmitting one slot data (Figure 26 ~ Figure 28). |
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