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NTE9672 Datasheet(PDF) 1 Page - NTE Electronics |
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NTE9672 Datasheet(HTML) 1 Page - NTE Electronics |
1 / 2 page NTE9672 Integrated Circuit High Threshold Logic (HTL) Quad, 2–Input NAND Gate Description: This NTE9672 is a Quad, 2–Input NAND gate with active output pull–up in a 14–Lead DIP style pack- age. The active output arrangement allows the circuit to handle capacitive loads at a higher speed than is obtainable with a passive pullup configuration. Additionally, the impedance in the high state is considerably less, and consequently makes this device more immune to electrical noise. The active output configuration also allows for a more powerful arrangement to interface with discrete compo- nents. Electrical Characteristics: (TA = +25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Output Voltage VOL IOL = 12mA, VIH = 8.5V, VCCL = 14V – – 1.5 V VOH IOH = –0.03mA, VIL = 6.5V, VCC = 15V, VCCL = 14V 12.5 – – V Short–Circuit Current ISC VCCH = 16V –6.5 – –15 mA Reverse Current IR VR = 16V, VCCL = 14V – – 2 µA Output Leakage Current ICEX VCEX = 16V – – 100 µA Forward Current IF VF = 1.5V, VR = 16V, VCCH = 16V – – –1.2 mA Power Drain Current ICCL VCCH = 16V – – 6 mA Total Device ICCH – – 20 mA Switching Times t1–3+ IOL =12mA (Pulse In), – – 200 ns t1+3– IOH = –0.03mA (Pulse Out), VCC = 15V – – 100 ns |
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