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M45PE20 Datasheet(PDF) 5 Page - STMicroelectronics

Part No. M45PE20
Description  2 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M45PE20 Datasheet(HTML) 5 Page - STMicroelectronics

 
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M45PE20
SUMMARY DESCRIPTION
The M45PE20 is a 2Mbit (256K x 8 bit) Serial
Paged Flash Memory accessed by a high speed
SPI-compatible bus.
The memory can be written or programmed 1 to
256 bytes at a time, using the Page Write or Page
Program instruction. The Page Write instruction
consists of an integrated Page Erase cycle fol-
lowed by a Page Program cycle.
The memory is organized as 4 sectors, each con-
taining 256 pages. Each page is 256 bytes wide.
Thus, the whole memory can be viewed as con-
sisting of 1024 pages, or 262,144 bytes.
The memory can be erased a page at a time, using
the Page Erase instruction, or a sector at a time,
using the Sector Erase instruction.
Figure 2. Logic Diagram
Figure 3. SO and VDFPN Connections
Note: 1. There is an exposed die paddle on the underside of the
MLP8 package. This is pulled, internally, to VSS, and
must not be allowed to be connected to any other voltage
or signal line on the PCB.
2. See PACKAGE MECHANICAL section for package di-
mensions, and how to identify pin-1.
Table 1. Signal Names
Reset
AI07400
S
VCC
M45PE20
VSS
W
Q
C
D
1
AI07401
2
3
4
8
7
6
5
W
S
VCC
VSS
C
DQ
Reset
M45PE20
C
Serial Clock
D
Serial Data Input
Q
Serial Data Output
S
Chip Select
W
Write Protect
Reset
Reset
VCC
Supply Voltage
VSS
Ground


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