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IS63LV1024L-8B Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS63LV1024L-8B Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 9 page IS63LV1024L ISSI® Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. B 08/07/02 Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT FEATURES • High-speed access times: 8, 10, 12 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 3.3V power supply • Packages available: – 32-pin 300-mil SOJ – 32-pin 400-mil SOJ DESCRIPTION The ISSI IS63LV1024L is a very high-speed, low power, 131,072-word by 8-bit CMOS static RAM in revolutionary pinout. The IS63LV1024L is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels. The IS63LV1024L operates from a single 3.3V power supply and all inputs are TTL-compatible. FUNCTIONAL BLOCK DIAGRAM A0-A16 CE OE WE 128K X 8 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VCC I/O DATA CIRCUIT I/O0-I/O7 AUGUST 2002 – 32-pin TSOP (Type II) – 32-pin STSOP (Type I) – 36-pin BGA (8mmx10mm) |
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