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High Performance Configurable

8-bit Microcontroller

ver 3.01

OVERVIEW

DR8051CPU is a high performance, area

optimized

soft core of a single-chip 8-bit em-

bedded controller dedicated for operation with

fast

(typically on-chip) and slow (off-chip)

memories

. The core has been designed with a

special concern about low power consump-

tion

. Additionally an advanced power man-

agement unit makes DR8051CPU core perfect

for portable equipment

where low power

consumption is mandatory.

DR8051CPU soft core is 100% binary-

compatible with the industry standard 8051 8-

bit microcontroller. There are two configura-

tions of DR8051CPU: Harward where external

data and program buses are separated, and

von Neumann

with common program and ex-

ternal data bus. DR8051CPU has RISC archi-

tecture 6.7 times faster compared to standard

architecture and executes 65-200 million in-

structions

per second. This performance can

also be exploited to great advantage in low

power

applications where the core can be

clocked up to seven times more slowly than

the original implementation for no performance

penalty.

DR8051CPU is delivered with fully auto-

mated testbench

and complete set of tests

allowing easy package validation at each stage

of SoC design flow.

CPU FE A T UR ES

standard 8051

structions 6.7 times faster compared to

standard 8051

Memory

Memory

States solution for wide range of memories

speed

Wait States solution for wide range of

memories speed

easy connection to memory

Registers

sign with positive edge clocking and no in-

ternal tri-states